[Computer Principles]--Basic Introduction to CPU

1. The production process of the CPU

Sand Deoxidation -> Quartz -> Silica -> Purification -> Forming Silicon Ingot -> Cutting -> Wafer -> Applying Photoresist -> Performing Photolithography -> Etching -> Removing Photoresist -> Plating -> Polishing -> Copper layer -> Testing -> Slicing -> Packaging

2. The composition of the computer

3.CPU related

1. L3 cache is shared by multi-core CPU
2. Hyper-Threading: Hyper Threading is a synchronous multi-execution technology. Its principle is very simple, which is to use one CPU as two.
3. Word length: Indicates a fixed length for one-time transaction processing. The number of bits in a word is the word length
4. MESI: refers to the four states of the cache line
   (1) modified: modified
   (2) exdusive: exclusive
   (3) shared: shareable
   (4) invalid: invalid
5. Cache line: Each cache in the CPU is composed of a cache line, and its size is usually an integer power of two consecutive bytes. When multiple threads modify independent variables each other, if they are in a cache line, they will affect each other's performance, which is pseudo sharing.
6. Cache line alignment: Because the default size of each cache line is 64 bytes, we can make each cache line have only one independent variable by way of placeholders to avoid the problem of false sharing. (You can also use the contended annotation to avoid contributing)
7. The size of each Intel cache line is 64 bytes
8. Instruction reordering: The reason for the order to avoid the rush is to make the instructions more in line with the execution characteristics of the CPU, maximize the performance of the machine, and improve the efficiency of program execution.
9. As-If-Serial: Instruction reordering must ensure that the execution result of the program in a single thread cannot be changed

4. The computing power of the CPU

Operation unit >> LO (register)> L1> L2> L3 (shared by multi-core CPU)> main memory> disk> remote file storage

5. Related interview questions

1. Do you want to use volatile in DCL mode? Yes
   , because volatile can prevent some threads from getting semi-initialized variables in multi-threaded situations. The reason for semi-initialized variables is instruction reordering