verilog实现两个数的最大公因数

课程作业verilog可编程器件

代码如下

 1   module ged( clk,x_i,y_i,go_i,d_o );
 2   parameter N=6;//用于定义输入数的范围,最大为2**N-1input[N-1:0]x_i,y_i ;input clk,go_i ;
 3   output reg[N-1:0]d_o;
 4   parameter s0=3"bl11,s1=3'b001,s2=3'b010,
 5   s3=3'b011,s4=3"b100,s5=3'b101,=3b110;
 6 
 7   reg[2 :0]current_state,next_state ;reg[N-1;0] x,y,r;
 8   always @ (posedge clk )/状态寄存器
 9   current state S next state;
10   always@ (current_state,x_i,y_i,go_i,x,y,r )产生下一个状态的组合逻辑
11   case( current state )
12   SO :if( go_i )next_state s sl ;
13   else next.state S s0;
14   sl :if( x_i 2 y_i )next_state s s2 ;
15   clse next._state s s3 ;
16   S2 :begin next_ state S s4 ;end
17   s3 ;begin next_ state s s4 ;endS4:if(y >0)next state S s5;
18   else next_ state S s6;
19   S5 :begin next_ state s s4 ;end
20   s6;begin next.state S s0;enddefault :next.state S sO;
21   endcase
22   always @ (negedge clk)/ /产生输出和中间变量的组合逻辑
23   case( current state )
24   S2:begin x=x_i;y=y_i;endS3:begin x=y_i;y=x_i;end
25   S5:bcgin r=x%y;x=y;y=r;endS6 :begin  d o=x;enddefault: ;
26   endcase
27   endmod ule