Assembly Language Learning Chapter 8

1. The two basic problems of data processing

    This is already commonplace matter, data processing There are two key issues:

First, the data to be processed in any place?

How long does the second data is to be processed?

    These two issues are the basis of our program, and if you do not know the data come from its size

Excellent computer and then it also will not do anything

    Here define two symbols reg and sreg:

    It represents a register reg: ax, bx, cx, dx, and cut them out of the 8-bit register, sp, bp, si, di

    sreg segment registers represents: ds, ss, cs, es

 

    Upper register, not only introduced bp, bp Let me talk about this alone is a function similar to the bx register, but not general-purpose registers

Bp segment address is stored in the ss allowed sreg: [bp] for memory access

 

First to solve the first problem, the data in what place?

    Most of machine instructions are used to command the processing data, after all, originally designed computer is processing data

    Category three data processing instructions:

        Read Write operation

    For machine instructions for it, it does not care about value, only care about the machine instruction is executed immediately before, the location data

    In this moment, the data will normally be three positions: CPU internal memory port

    MOV BX, [ 0 ] memory 

    MOV BX, AX internal CPU, registers 

    MOV BX, internal 01H CPU, instruction buffer

    So, how to express where the data is in assembly language?

        Immediate:

            For direct data contained in the instruction, immediate data compilation is called

            mov ax, 1

            add ax, 200h

            or ax, 0DFH

            mov al, 'a'

 

        register:

            Data stored in the internal register

        mov ax, bx

        mov ds, ax

        push ds

        pop sp

 

        

        SA + EA:

            The default is sreg bx ds

            The default is sreg bp ss

            Of course, also pointed out that currently allow sreg

            mov ax, ds: 3 [bx + si] 

            mov dx, es: 3 [bp + in]

 

    

        Each data has a little sister home, there will be a home address, how to find the data compilation little sister little sister's house it

    There are five methods are:     

        Direct addressing: [idata]

  Register relative addressing method: [bx]

        Register indirect addressing method: [bx] .idata (structure)

                            idata [si] (array)

                            [Bx] [idata] (two-dimensional array)

        Addressing Base Change Method: [bx] [si] (two-dimensional array)

        Addressing process variable relative to the base: [bx] .idata [si] (array of the table structure)

                            idata [bx] [si]

    

        Here I come to explain a little of these types of addressing methods (limited personal capacity):

    One day, data about CPU out to play little sister, little sister of data directly to the address that we meet in this place, which is the direct addressing, go directly address pressing on it

        If you go to the coffee shop Miss data said Tuesday met ( register ), and then tell you where to play, this is the register relative addressing method, (register) accessed through a pointer to a pointer, to access the corresponding data

   If you go to the coffee shop Miss data said Tuesday met ( register ), then walk a few hundred meters, before we tell you where to play, this is the register relative addressing method, (register) to access the pointer through a pointer, to access the corresponding The data

        If you go to the coffee shop and then she said Tuesday Miss Hall, then go to KFC, telling you where to play, this is the base address indexed addressing method, by the base address registers after a combination of two, access to data

        If you go to the coffee shop and then she said Tuesday Miss Hall, then go to KFC, a few hundred meters away only tell you where to play, this is the relative base address indexed addressing method by the base address through a combination of the two registers and then run a little way to access the data

 

 

Next to solve the next problem, the length of the data?

    In fact, this problem before it mentioned before, mov ax, how [bx] is to know the data length? Of course, is the number of bits through the register

    However, according to our previous set of mov es: [bx], ds: [bx] will not run properly, because the CPU can not sense the size of the data,

    So, this time the new declaration manner appeared, word / Byte ptr statement Word / Byte data type

    eg:

        mov Byte ptr es:[bx], ds:[bx]

        mov word ptr es:[bx], ds:[bx]

 

Well, here's the basic problem of programming be resolved, the next new instructions to learn the

 

div instruction:

    This is a divide instruction, and add and sub difference is, of div divisor and dividend have certain constraints

 

        Divisor: There are two kinds of 8-bit and 16-bit, or in a memory unit reg

        Dividend: Default AX or AX + DX on if the divisor is 16 bits, 32-bit dividend, the lower storage AX, the DX high storage

                If the divisor 8, the 16-bit dividend

        Results: The divisor is 8, AL deposit business, AH keep the remainder

                Divisor is 32, AX deposit business, DX deposit the remainder

    Consider: div FFFFH, 1 what will happen because, of course, the divisor over the General Assembly overflow

 

Directive dd:

    Indicates that the double word data

    eg:

        data segment

            db 1

            dw 1

            dd 1

        data ends

 

 

Operator dup:

    Defined deduplication

    dd 3 dup (2)    == dd 2,2,2

    dw 3 dup ('ABC','abc') === dw 'ABCabcABCabcABCabc'

 

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Origin www.cnblogs.com/daker-code/p/12449094.html