Assembly language learning Notes (2)

Assembler language consisting of:

1, assembly instructions: machine code mnemonic, a corresponding machine code
2, directives: no corresponding machine code executed by the compiler does not perform the computer
3, and the other symbols: recognized by the compiler, there is no corresponding machine code

Instructions and data

Instruction and data applications on the concept. In memory or on disk, instructions and data without any distinction, are binary information.

CPU memory read and write

CPU in order to read and write data, must interact with the following three types of information and the external device

  • Address (address information) storage unit
  • The selection device, read or write command (control information)
  • Read or write data (data)

Bus logically divided into three categories, the address bus, a control bus and a data bus.

Various types of memory chips

Divided into two memory chips viewed from read-write property: random access memory (RAM) and read only memory (ROM)
functionally connected and can be divided into the following categories.

  • Random access memory
  • Containing the BIOS ROM
  • The interface card RAM

Memory address space

When CPU manipulation of various types of memory, the memory of them as to treat them as a total logical memory by a number of storage units, the logical memory is what we call memory address space.

summary

1, the assembler instruction mnemonic machine instructions, machine instructions with one-
2, each CPU has its own set of assembly instructions
3, information from the CPU can be used directly stored in the memory
4, and the instruction in the memory there is no difference data, the binary information are
5, numbered sequentially starting at zero storage unit
6, a storage unit may store 8 'bit, i.e. 8-bit binary
7,1Byte = 8bit 1KB = 1024B 1MB = 1024KB 1GB = 1024MB
. 8, each CPU chip has a number of pins connected to these pins and the bus. It can be said, these pins outgoing bus.
: A CPU bus width leads to three different aspects of the performance of the flag of the CPU's
; width of the address bus addressing capability of the CPU determines
a data transfer amount of the data bus width of the CPU determines the data transfer with other devices ;
control of the bus width of the CPU determines the control system of other devices

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Origin blog.csdn.net/Deep___Learning/article/details/103962804