1. The segment register to be used ds, es This dedicated segment register, otherwise an error operand left must have segment (to the right of the left operand requires it to be a segment)
action and instructions: the instruction operation target by a corresponding bit is set to 0, other bits unchanged.
or instructions: the corresponding operation target bit is 1, the other bits unchanged.
2. sensitive issue: the other bits as uppercase and lowercase letters, uppercase letters fifth is 0, the fifth lowercase letters is 1, so we have a new approach: it will be the fifth 0 position, it must become a capital letter, it would be the fifth position 1, it must be lowercase letters.
Al and, 11011111b
or Al, 00100000b
3.si 8086cpu and di are similar in function and register bx, si, and di can not be split into two 8-bit registers used.
4. Addressing several ways: [bx + si] and [bx + di], [bx + si + idata], [bx + di + idata]
in 5.cpu registers: si, ax, bx, cx , CS, IP, DS, DX, DI, ES, SS, SP, BP
6.cpu only bx, si, di, bp four registers can be used in [] in the memory cell is addressed, and the address of the when only appeared in four combinations: bx and si, bx and di, bp and si, bp and di.
Bp long using the register in [], the instruction is not explicitly given segment address, the address on the default segment ss, such as the following instruction
MOV AX, [bp]
MOV AX, [bp + Idata]
MOV AX, [ Si + BP]
MOV AX, [BP + Si + Idata]
7. the instruction specifies a word ptr access memory unit is a word unit
indicates the instruction byte ptr access memory unit is a byte unit,
some default instruction access is byte units or word units, such as push [1000H] do not have access to the specified byte units or word units, because the push instruction perform word operation only.
8. The [BX] .10H [Si] = BX + 10H + Si
9.div default instruction on the dividend and dx or ax ax, the
divisor is 8 bits ax: dividend Results: ah: remainder, al: supplier
divisor is 16 bits dx + ax: dividend dx: remainder, ax: supplier
before the div instruction execution, the dividend must be placed well into the respective register, on the back of the contents of the divisor div instruction
10.db byte data, DW font data (2B), dd double word (4B)
11.dup and db, dw, dd directives with other data definition used for data repetition
db 3 dup (0) corresponds db 0, 0,0
DB DUP. 3 (0,1,2) corresponds 0,1,2,0,1,2,0,1,2 DB
DB DUP. 3 ( 'ABC', 'the ABC') corresponds db'abcABCabcABCabcABC '
defined segment 200 bytes of stack
stack segment
DB 200 DUP (0)
stack ends
