IPC IC Example:
IPC 1. IP key points: ISP IP, Codec IP, IP intelligent algorithm
A ISP IP:. General use PC + VC ++, Matlib, Opencv and so do the algorithm design, choose an opponent, dry towards this goal. Keep iterating until reaching the target. (Is nonsense)
The most important is the effect of IP test report: subjective indicators, objective indicators
Outdoor subjective indicators: the open scene, AWB, low noise, motion, infrared, light inhibition, complex texture, etc.
Interior subjective indicators: static scene, character, vision, WDR, low noise, infrared, complex textures, movements, changes in light, bright, large, solid, etc.
Objective indicators: resolution, color reproduction, the AWB, gray, WDR range, delay, minimum illumination, bit rate, signal to noise ratio, brightness uniformity, geometric distortion, and the like viewing angle
After satisfaction can FPGA simulation and verification, finished out at this stage can improve the Demo to customers.
B Codec the IP:. Usually fluctuations in the data analysis, signal to noise ratio with other codec tools Elecard
C . Intelligent algorithm IP:
DSP: I am not optimistic, do not explain (explanation, a car, then have lots to talk about)
GPU: NVIDIA + X86 is a trend
Operator: There are some bottlenecks (own torment it)
2. algorithm, IP and FPGA design relationship?
Algorithm (buy, create, open source) -> IP design (Verilog etc, EDA) -> FPGA (verification algorithms and IP, verification SDK, or even Turnkey APP)
3. demand delivery and feedback mechanisms at all levels.
For example: IC group to the BSP Group delivery BinFile, doc and other resources, the BSP Group run system to minimize the IC, the IP Group facilitate verification and feedback.
Algorithm group to the SDK group delivered algorithm, driving, test, documentation, SDK group to the algorithm group mention needs
4. The main meeting is to coordinate resources and share resources; engage in taboo meeting details.
