1. What is DFT?
When it comes to DFT, most people think of Discrete Fourier Transform (DFT for short). The author was severely abused by the signal and system course in college. But in the IC world, the full name of DFT is Design For Test.
It refers to the insertion of various hardware logics to improve the testability (including controllability and observability) of the chip in the original design of the chip. Through this part of the logic, test vectors are generated to achieve the purpose of testing large-scale chips. .
Design – to achieve a specific auxiliary design, but a certain amount of hardware overhead is required.
For test – to use the implemented auxiliary design to generate efficient and economical structural test vectors for chip testing on ATE.
2. DFT workflow
The workflow of DFT is believed to be different in different companies, mainly depending on the company's process and the size of the chip.
Generally speaking, after receiving the project, they will meet with front-end/back-end/test engineers and test engineers to formulate DFT Spec, including IP test strategy, Pin sharing, HT Block division and Clock design, etc.
Next, the above-mentioned circuits (RTL/Gate Level insertion) will be inserted into the design by modules, and then synthesized, followed by the insertion of Scan Chain connections and related circuits.
After that is the verification stage, using different EDA tools to verify the circuit, such as SpyGlass for Rule Check. Then you can run ATPG and Simulation verification.
At the same time, we will cooperate with the back-end engineers to carry out physical implementation to see if the Test SDC is reasonable.
Then reconfigure parameters according to different requirements (such as Coverage, physical implementation cost) for circuit adjustment, which will go through multiple iterations.
When the final netlist is physically realized, ATPG will be run with tools to generate the final pattern and perform gate-level simulation verification.
After the final chip is produced, it will be brought-up with PE/TE. Many problems will be found in this process, which may be pattern% or circuit problems. This step is the most frustrating. If it is light, it will regenerate the pattern to solve it, and if it is serious, it will be found that it is a brick. Finally, it is possible to cooperate with TE to improve the yield
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The DFT architecture of large companies such as Intel, Nvidia, and AMD is basically mature. The design related to DFT is also relatively solid, and the logic of DFT can be instantiated directly in each function IP.
3. What is the career development path and prospect of DFT?
At present, there is still a big talent gap in DFT. At present, large-scale design companies in China are recruiting DFT engineers.
I think the reason why there are fewer DFT engineers is that most colleges and universities do not have DFT-specific courses or directions at the graduate level, so everyone does not have a deep understanding of DFT, which is relatively small compared to design verification and testing.
This is precisely a role that becomes more and more important in large factories. In the past few years, we did not pay much attention to DFT, and in recent years we have gradually entered the high-end line, so now DFT engineers are extremely scarce.
For a long time, DFT technology has been continuously optimized and improved. Whether it is to study technology to be a technical expert, or lead a team to be a leader, as long as you are experienced in the industry, you can have a very good prospect.
If you are facing the choice of entering/changing IC, are still not sure about the positions in various directions, are not interested in code, and don’t want to be a back-end, then you might as well consider DFT, which is also a career that can go a long way and is worth fighting for. job selection.
4. What is the salary and overtime status of DFT positions?
According to data from recruitment websites such as Zhaopin.com and Lagou.com, as of April 2023, the average salary of DFT engineers ranges from RMB 20,000 to RMB 35,000 per month, and the salary of top positions can even reach RMB 35,000 per month More than 60,000 RMB.
Judging from the current market demand, DFT has a large demand. There is no mature system for personnel training. The current DFT engineers are either trained by enterprises or transferred to other jobs, with an average annual salary of up to 30W. Regarding the DFT position, Xinxuechang.com has a detailed introduction. If you are interested in other positions in IC design, you can also go to Xinxuechang.com.
Overtime status:
As far as DFT itself is concerned, the work intensity is relatively lighter than that of the front-end, but the specific overtime status still needs to be determined according to the company's project.
5. DFT introductory book recommendation
1. Digital system design and design for testability
This book mainly introduces the basic knowledge of digital system design and design for testability, including the basic knowledge of digital circuit and computer composition principles, basic concepts such as test pattern generation and boundary scan. The explanation of this book is easy to understand, suitable for beginners to read.
2. VLSI Testing
This book systematically introduces the testing methods and technologies of digital integrated circuits and memories, including test pattern generation, boundary scan, BIST, etc. Test methods and techniques for mixed-signal systems are also introduced in the book. This book is a very good textbook for beginners.
3. VLSI Test Principles and Architectures
is a classic DFT textbook, which mainly introduces the principles and applications of DFT technologies such as test pattern generation, boundary scan, BIST, and ATPG. The content of the book is comprehensive and easy to understand, suitable for beginners and professionals who study DFT.
4. System-on-Chip Test Architectures
This book mainly introduces the techniques and methods of modern SoC testing, including multi-core testing, power consumption testing, reliability testing, etc. The content of the book covers the latest technology of modern VLSI testing, suitable for professionals engaged in SoC testing and design reading.
I believe that many students who understand chip design positions have heard of DFT design testing. The full name of DFT is Design for Test (reliability design). As we all know, the purpose of testing is to ensure the quality of finished chip products and the necessary measures for the reliability of functional logic.