Makefile (c)

In normal use, the following may be used to compile separate code makefile

src = $(wildcard *.c)
obj = $(patsubst %.c, %.o, $(src))

CC = gcc
CFLAGS = -Wall -g

all:$(target)

$(target):%:%.c
    $(CC) $< -o $@ $(CFLAGS)

.PHONY: clean all
clean:
    -rm -rf $(target)

It is to make use of the file name followed by the program can be compiled separately (do not add the suffix .c)