Nand Flash memory chip to operate, must be completed by a dedicated register Nand Flash controller. So, Nand Flash can not be bus operation. The Nand Flash write operation must block the way. Nand Flash read operation can read bytes.
Nand Flash Controller Features
1. Support reading of Nand Flash chips, testing, programming control
2. If the boot from the Nand Flash support, automatically transport the front Nand Flash 4KB data before ARM to restart after each internal RAM
3. Support ECC check
Nand Flash controller works
Nand Flash controller mapping in its dedicated register area (SFR) address space has a special function register their own, that is, by Nand Flash chips equipped command writes to its special function registers in order to achieve reading of Nand flash chips, inspection and control of programming. There are special function registers: NFCONF, NFCMD, NFADDR, NFDATA, NFSTAT, NFECC. Storage described in detail in the next section.
Nand flash controller special function registers Details
1. Configuration Register (NFCONF)
Function: the configuration for controlling the state of Nand Flash controller.
In the address space Address: 0x4E000000, in which:
Bit15: Nand Flash controller enable bit set to 0 for prohibiting Nand Flash controller, set to activate on behalf of Nand Flash controller; To access the Nand Flash chip storage space, you must activate Nand Flash controller. In Set automatically reset after 0, 1 must be the position during initialization.
Bit12: initialize ECC bit which is set to the initialization ECC; 0 is set to not initialize ECC.
Bit11: Nand Flash memory chip enable bit, 0 represents the set may operate on the storage space; represents a set operation on the storage space. After reset, this bit is 1 automatically.
Bit10-8: TACLS bit. According to this setting period the CLE & ALE. TACLS range of values between 0-7. Bit6-4,2-0 are: TWRPH0, TWRPH1 bit. Set write access cycle. Value between 0-7.
2. Command Register (NFCMD)
Function: Nand flash chips used to store site operations command.
In the address space Address: 0x4E000004, in which:
Bit0-7: Nand flash chip command to store specific features of value. The remaining bits are reserved for future use.
3. Address Register (NFADDR)
Function: a value for storing the address of Nand flash memory chip addressing means.
In the address space Address: 0x4E000008, in which:
Bit0-7: used to store the address value. Because of this paragraph only address Nand flash chip I / O0-7 / data multiplexed address pins and four weeks
Of every eight fed, so here we use only eight. The remaining bits reserved for future use.
4. Data Register (NFDATA)
Function: Nand flash chip will perform all the features command value into the register. Meanwhile, read, write Nand flash
Value is stored into the register space. Address in the address space: 0x4E00000C, wherein: Bit0-7: the need for storing and reading out written data. The remaining bits are reserved substitute.
5. Status Register (NFSTAT)
Function: Nand flash chip for the detection of the last of its operation of the storage space is complete.
In the address space Address: 0x4E000010, in which:
Bit0: Nand flash chips set to 0 indicating the last operation is busy storage space; 1 indicates Nand flash chip is ready to receive a new request to the memory space operation.
6. ECC check register (NFECC)
Function: ECC check register address in the address space: 0x4E000014, wherein: Bit0Bit7: ECC0
bit8bit15: ECC1 bit16bit23: ECC2