stm32 read and write nand flash

1 Introduction

Currently I am using stm32f407ZGT6 to read and write Samsung's nand flash [K9F1G08U0E].
I bought the board here
[STM32F407ZGT6 minimum system board/core board/adapter board/development board/plus 128M FLASH],
which can be optionally equipped with a K9F1G08U0E.
For this nand flash, you can choose to use stm32 FSMC for reading and writing.
I wrote the stm32 program using stm32cubeide, which is very convenient.

2. Data reference

You can find this information by searching for AN2784 on the official website.
[AN2784: Using the high-density STM32F10xxx FSMC peripheral to drive external memories]
Here are the addresses of each bank for reference. This address is very important for setting the following parameters.
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3. Frequency setting

After configuring the project, you need to set up the crystal oscillator and set the CPU frequency to 168Mhz.
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4.FSMC parameter settings

Then set the nand flash configuration. Note that it is best to set the parameters exactly the same as below. Other parameters may be possible, but I have not tested it yet.
This time, RB interrupt is not used, ECC check is not performed, etc. In fact, it is better to use it, but I have problems as soon as I use it, so I forget it for the time being.
Insert image description hereAfter testing later, the Extra command enable must be turned on, otherwise the data read will be wrong and will be 0x30. [STM32F767 NAND FLASH MT29F4G08 read and write data]

After configuring, you need to switch to code mode and check whether the parameters on the code side are consistent with the screenshot below: You
Insert image description herecan see that there is a difference of 1 from the ui parameters. I don’t know why. But the parameters of the code are what we want.

5. Modify the macro definition NAND_DEVICE

Then the most important point is that you need to modify the definition of NAND_DEVICE in the header file stm32f4xx_hal_nand.h.
Because we are selecting bank2 now, and bank2 starts from 0x70000000UL, not 0x80000000UL.
I don’t know how the stm32cubeide library handles this. When using FSMC to read and write nand flash, whether you choose bank2 or bank3, it uses 0x80000000UL by default. I don’t know what kind of bullshit logic it is (maybe I sounded a little harsh, but if you have been tortured by this problem for four or five days like me, you should be able to understand my feelings).
What's even more disgusting is that every time after modifying some data in the IOC interface, the system regenerates the code, and it will change the stm32f4xx_hal_nand.h back to the original 0x80000000UL, which means that you need to change it again. . . .

- #define NAND_DEVICE                0x80000000UL
+ #define NAND_DEVICE                0x70000000UL

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6. Program testing

6.1. Simple test

Then you can write a program to test it:
![INSERT IMAGE DESCRIPTION HERE

As long as the read NAND_ID is [0xec 0xf1 0x00 0x95], it basically proves successful.
[K9F1G08U0E Manual]
Insert image description here This is the result of my debug. You can see that it is consistent.
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6.2. Erase, write, read test

Remember to delay a little before reading or writing after erasing, otherwise problems may occur.

 HAL_StatusTypeDef ret = HAL_OK;

  NAND_IDTypeDef info;
  ret = HAL_NAND_Read_ID(&hnand1, &info);

  int nand_status = HAL_NAND_Read_Status(&hnand1);

  NAND_AddressTypeDef addr = {
    
    0, 0, 0};


  ret = HAL_NAND_Erase_Block(&hnand1, &addr);

  uint8_t buffer_write[2 * 1024];
  for(int i = 0; i < 2048; i++)
  {
    
    
	  buffer_write[i] = i;
  }
  ret = HAL_NAND_Write_Page(&hnand1, &addr, buffer_write, 1);

  nand_status = HAL_NAND_Read_Status(&hnand1);

  uint8_t buffer[2 * 1024] = {
    
    0};
  ret = HAL_NAND_Read_Page(&hnand1, &addr, buffer, 1);

Notice

a. Sometimes there is no problem with the program, but when I use st-link to debug, it always crashes. I don’t know why. Is it because my st-link is a copycat?


Reference:
[NandFlash Board (A)]
[STM32F407 FSMC driver MT29F4G08A NAND FLASH source code sharing]

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Origin blog.csdn.net/joyopirate/article/details/131743763