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Understand Nand Flash from the underlying physical principles.
1. The birth of memory:
Modern computers use memory to store data, which stores 0s and 1s. Then, the binary numbers are translated into information used in people's daily lives through ASCII code (American Standard Code for Information Interchange). This information includes commands we commonly use in computer equipment (such as spaces, carriage returns, etc.), letters, numbers, punctuation marks, etc. In 1992, Unicode (Character Standard Code) was released, which solved the shortcomings of ASCII code in expressing languages in other countries and regions. Through different permutations and combinations of 0s and 1s, we can obtain different information and communicate with humans.
Why is it binary?
Because of the limitations of the technology at that time and even now, the field effect transistor (FET) manufactured by people can only distinguish between the off state and the on state. Sensitivity is the highest. If we introduce other states between on and off, we usually use the current value at a fixed voltage to distinguish the states. Therefore, when the external environment is relatively harsh, it is easy to cause the current to become larger or smaller uncontrollably (such as temperature factors). , the intrinsic carrier concentration of semiconductors depends heavily on temperature. When the temperature is high, the intrinsic carrier concentration increases rapidly, and the current will rise sharply, thus losing the purpose of switching and amplification. Therefore, the operation of semiconductor devices such as CPUs requires cooling Heat dissipation is very important), which leads to incorrect identification of states during computer operation. The more states there are, the higher the bit error rate.
A complete CPU should include control unit, registers, ALU (arithmetic logic unit), RAM (random access memory). Of course, this RAM is generally an independent device, connected to the CPU through data lines, address lines, read lines and write lines. Such a structure can actually run many computer instructions, but one problem is that this computer can only It can only be used when the power supply is on. After the power is cut off, the operating data will be lost immediately. So in order to solve this problem, we invented ROM (read-only memory). This kind of memory can retain the desired CPU operation results. Even if the power is off, it can be saved for a long time, such as the documents you wrote. Downloaded music and videos can be saved for a long time. Here comes a classification method of memory. According to whether the data can be saved for a long time after power failure, we divide the memory into volatile memory and non-volatile memory. The following is a mind map of the basic classification of memory that I compiled.
Fig. 1 Basic classification of memory
In fact, the read operations of RAM and ROM are almost the same. More appropriately, RAM is sometimes called read-write memory. However, people have been developing ROM rewrite capabilities. So now the main difference between RAM and ROM is how often and easily it can be erased and programmed. The chances of RAM rewriting and reading are always equal; while the frequency of ROM reading is much greater than rewriting.
This sentence may make everyone have a clearer understanding of RAM and ROM. Since RAM is also a FET (field effect transistor) structure, its read and write capabilities are refreshed through electricity. The control unit in the CPU will often store instructions into the RAM. Instructions are read from RAM, so the frequency of reading and writing is basically the same. For ROM, the most common forms we use now are NOR flash and NAND flash. Different memories are used according to different scenarios. Nor flash is mostly used in embedded systems; mobile phones, PCs, and USB are generally used to store data. We use this data. The number of reads is generally more than the number of writes, but the frequency of writes is still relatively high. NAND flash is generally used here. We will show the reason for this later.
Memory below refers to Flash memory
2. Flash principle:
NAND flash is based on FET, adding a floating gate, and programming is achieved by injecting electrons into the floating gate. Its basic structure is as follows:
Fig. 2 Flash memory basic unit
2.1 Flash Theory
Taking the above figure as an example, by biasing a positive (negative) voltage on the n-channel FET gate and inducing negative (positive) charges between the source and drain channels, the electrical channel between the source and drain can be opened (closed). This voltage that opens the current channel between the source and drain is called the threshold voltage VT, which is the voltage required for the channel to change from flat to inverted. Then insert a floating gate into the gate oxide layer. When the floating gate is charged with electrons, due to the shielding effect of electrons, a higher VT is required to open the n-channel FET. We call the VT without electron injection VT1, and the VT after electron injection is called VT0. Just imagine, when we use a voltage VT′ that is greater than VT1 and less than VT0 to try to turn on the FET, if the circuit is turned on at this time, it means that no electrons have been injected into the FET floating gate. If it does not open, it means that electrons have been injected into the FET floating gate. We know that in the CPU logic circuit, the open state represents '1', and the off state represents '0'. Following this logic, if electrons are not injected into the floating gate, it is an open state, which represents a logic '1'; when electrons are injected into the floating gate, it is Off state, indicating logic '0'. Don’t doubt that this is contrary to your intuition. Here, injecting electrons means writing ‘0’; erasing electrons means writing ‘1’. The principle of this type of memory can be summarized in one sentence: the storage function is achieved by injecting electrons on the floating gate to change the FET threshold voltage VT.
2.2 Two memory programming methods
We have injected the soul into the memory, now we need to build its muscle, that is, how to implement the process of injecting and erasing electrons. There are two main process principles for injecting electrons, one is hot electron injection, and the other is F-N tunneling (Fowler-Nordheim tunneling).
NAND cannot use hot electron injection. NAND is F-N tunneling, and NOR is a hot electron injection process.
2.2.1 Hot electron injection
Hot electron injection is to add a voltage between the source and drain. Due to the voltage drop principle, the electric field intensity reaches the maximum value near the drain end (because the source electrode is generally grounded), so the electrons have the greatest energy near the drain electrode during the action of the electric field. Become hot electrons. When their energy is greater than the Si/SiO2 interface barrier, the electrons can cross the barrier (classical mechanics) and enter the floating gate. Under the action of the electric field, the hot electrons collide with the crystal lattice to form secondary electrons. Secondary electrons can also be injected into the floating gate. In order to allow electrons to be effectively injected into the floating gate, a positive bias is generally added to the control gate to form a triangular barrier (as shown below), which helps the electrons to be injected into the floating gate, and at the same time a gate current is generated. , if there is current, there will be power consumption, which is a drawback.
fig 3 Hot electron injection theory
2.2.2 F-N tunneling
Another way is F-N tunneling. According to quantum mechanics theory, electrons have a probability of tunneling through a potential barrier with a higher energy than themselves. The probability of tunneling depends heavily on the height and width of the barrier. In Flash, this barrier is the dielectric layer. The dielectric layer is usually SiO2, but there are also other high dielectric constant materials used in memories. Once the material is determined, the barrier height is determined, and its thickness becomes the only parameter. We can control whether electrons can tunnel and function as a switch by controlling the thickness of the barrier.
Fig. 4 Quantum tunneling
With such a theory, how do we implement it? Fortunately, the control gate can help us change the barrier thickness. Do you remember Chapter 8 MIS Structure in Liu Enke's "Semiconductor Physics"? When a voltage is applied to the control gate, the energy band of the dielectric layer will bend into a triangular potential barrier, which narrows the barrier thickness for electrons. So we can change the barrier thickness of the dielectric layer by controlling the gate, thereby controlling whether electrons can tunnel through the dielectric layer and enter the floating gate. The picture below is a schematic diagram. The picture on the left shows that applying a positive bias to the control gate causes channel electrons to tunnel through the bottom dielectric layer into the floating gate, completing programming '0' (Program state). The picture on the right shows that applying a negative bias to the control gate causes electrons from the floating gate to tunnel through the bottom dielectric layer. layer to the channel, completing programming '1' (Erase state).
Fig. 5 F-N tunneling mechanism
At this point, the underlying principles of flash memory are finished. To sum up, flash memory is based on FET, adding a floating gate in the dielectric layer. By controlling the gate, electrons are injected into the floating gate or erased from the floating gate to achieve programming. Injecting electrons means programming and writing. Writing '0', erasing electronic means programming writing '1'. The reading process is to bias the gate to a voltage slightly higher than the threshold voltage of the uninjected FET. The source and drain are connected to "1", and the disconnected device is "0", which corresponds to writing. There are two processes for injecting electrons in programming, one is hot electron injection and the other is F-N tunneling, but erasing electrons only have F-N tunneling. The voltage applied to the control gate during F-N tunneling is very high and much larger than the read voltage. After all, it needs to tunnel through. What we are talking about here is floating gate devices. Another device is charge trapping devices. Compared with floating gate devices, the electron trapping layer here is generally silicon nitride, and electrons are mainly captured at the oxide-nitride interface. For example, floating-gate devices capture electrons like water, while charge-trapping devices capture electrons like cheese. Its F-N tunneling is a modified F-N tunneling, which first tunnels through a very thin trapezoidal oxide layer barrier, and then a triangular silicon nitride barrier.
3. Important parameters of flash memory
A basic introduction to the basic unit of flash memory, and then a look at the important parameters that affect it. A memory, what do we value? It is cheap, has high storage density, long storage time, fast reading and writing speed, and many reading and writing times. Memory whispered BB: MMP, human beings want to be good at everything, but I can’t do it.
Not to mention cheap, it requires the use of cheap materials and mature processes (to reduce marginal costs), and storage density requires advanced process technology. Let’s focus on the next three parameters:
3.1 Long storage time
This is easy to understand. The memory only stores '1' and '0'. '1' Fortunately, there are no electrons on the floating gate. As mentioned earlier, if you want to inject electrons, you need a very high control gate voltage, so the electrons will not spontaneously enter the floating gate, thus destroying your data '1' . The trouble is data '0'. Once electrons are injected into the floating gate, even if we no longer erase or write the memory, the electrons will still slowly escape (the electron chemical potential on the floating gate is relatively high). We generally define that when the charge is reduced to 50% of the initial value, it is called data loss. This time can be obtained using the following formula:
ν: Dielectric relaxation frequency, related to the properties of the material itself, can be understood as the reciprocal of the thermal equilibrium time
q: element charge quantity
ϕB: barrier height
k: Boltzmann constant
T: Temperature
It can be seen that the barrier height is the most important parameter, and the barrier height is determined by the thickness of the dielectric layer. What we said above is that the memory no longer performs the erasing and writing process, so the electron escape time is about 100 years. That is to say, theoretically, after you fill the SSD with data, you will never write or erase data again. , this data can be stored for 100 years. But in fact it is impossible not to erase or write at all. Depending on the frequency of erasing and writing, the theoretical life of an SSD ranges from 10 to 30 years. If it is very frequent, it may even break down in 3 to 5 years. This is because the chemical bonds in the dielectric layer under the floating gate degrade during the erasing and writing process, causing the dielectric effect to weaken and the data storage time to be shorter and shorter until it is eventually unusable. (It used to be thought that erasing and writing processes would cause the dielectric layer to become thinner. However, the latest research points out that it does not become thinner, but the chemical bonds degrade, making it easier for electrons to enter and exit.)
3.2 Fast reading and writing speed
According to the performance requirements, we certainly hope that the memory can be stored as long as possible, so the dielectric layer needs to be thicker. But if it is thicker, there is a problem. The programming time will increase, because when the potential barrier is large, the tunneling current will decrease. Because whether programming is successful depends on the change in charge on the floating gate, and a certain amount of charge is the time integral of the current. If the current is small, the time will naturally be longer. Therefore, in order to balance these two key parameters, the industry will slowly optimize the thickness of the dielectric layer and try to balance these happy enemies. The thickness of the lower dielectric layer is generally about 8 nm, and the thickness of the upper layer is generally about 14 nm.
3.3 Read and write frequently
The last parameter is the number of programming times. The number of programming times must be related to the usage time. Programming times without talking about time is just a rogue. As mentioned above, every erasing and writing process will cause loss of the dielectric layer, which is irreversible. In other words, the higher the erasing and writing frequency, the shorter the lifespan, and the lower the erasing and writing frequency, the longer the lifespan. I found a paper. The research results in the paper show that if the number of erases is less than 3,000 times, the data can be saved for about 3 years. If the number of erases is 150,000, then the data can only be saved for 3 days. Of course, it does not mean that it cannot be used after 150,000 erases and writes. You can read the data and rewrite it within 3 days, and then it can be used again. However, as the number of times increases, the storage time will become longer. It's getting shorter and shorter, but you can see that non-volatile memory is slowly "evolving" to volatile memory. In order to solve such a problem, it can only be solved at the software level. By optimizing the algorithm code, the memory erasing and writing frequency is reduced, thereby increasing the lifespan.
reference:
Basic Principles of 3D Nand Basic Principles of 3D Nand - Everything you want to know is here (Part 1) - Zhihu
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