The algorithmic state machine (English: , abbreviation: ASM) method is a method of designing finite state machines. In digital circuit design, an algorithmic state machine diagram is a graphical description of sequential logic state transitions.

algorithm state machine

The algorithmic state machine (English: , abbreviation : ASM ) method is a method of designing finite state machines . In digital circuit design, an algorithmic state machine diagram is a graphical description of sequential logic state transitions. Functionally, algorithmic state machine diagrams are similar to state charts . :516

Differences from flow charts

In appearance, algorithmic state machine diagrams and computer programming flow charts use quite similar graphical symbols, but they are very different. This difference is caused by the essential difference between software design and hardware design: the state transition of the hardware digital circuit is synchronized based on the timer signal, that is, each clock "steps" a state, so the algorithm state machine The state transition contains a clock signal, and the time spanned by the transition of adjacent states is often exactly a single time pulse, while software programming generally does not contain time pulse signals. :81:518

design steps

To design a finite state machine using the algorithmic state machine method, you need to complete the following steps in sequence:

Create a set of corresponding algorithms based on the state jump function that needs to be completed, and pseudo code can be used to describe the required workflow of the circuit module;
Convert pseudocode to algorithmic state machine diagram (ASM diagram);
Design the data path based on the algorithm state machine diagram;
Complete other details of the algorithm state machine diagram based on the data path;
Design control logic units for transitions between various states of the algorithm state machine.

Algorithm state machine diagram

status box

state decision box

conditional output box

The algorithm state machine diagram (ASM diagram) consists of four basic elements: state name, state box, state decision box and conditional output box. The latter three are connected by arrows. Since the output of the Moore-type finite state machine is only related to the current state, its output is marked inside the state box, while the output of the Milli-type finite state machine is not marked in the state block. :82

State name: The name of each state of the finite state machine is marked in the upper left corner of a state block, and sometimes the status code assigned to the state can also be marked.
State box: Its shape is a rectangular box, and the output of the Moore-type finite state machine is represented by the state box (the output is only related to the current state: 82).
State decision box: Its shape is a diamond-shaped block. This block will be marked with the expression to be tested, and then corresponding to different test results, different processing paths will be given. The state decision box of an algorithmic state machine generally has one input path and two output paths (corresponding to conditions satisfied and conditions not satisfied respectively). The selection condition expression of the state determination box is a function of two input variables.
Conditional output box: Its shape is a square block with rounded corners. The output of the Milli-type finite state machine is represented by the conditional output box (the output is related to the current state and the input signal at the same time: 82).

data path

After the finite state machine's sequential logic circuit is described with register transfer level hardware description language code, the synthesis tool automatically generates a series of data path components. The variables assigned in the process code block can store data through hardware registers in the actual hardware circuit. Depending on the functions implemented by different assignment operations, such hardware registers can be simple registers, shift registers , counters , or other flip -flop circuits containing combinational logic networks (the combinational logic networks can be adders , subtractors, and data selectors ). combination).

references

^ Stephen Brown, Zvonko Vranesic. . McGraw-Hill Education. 2002. ISBN 0-07-283878-7.
^ Mark Zwolinski. . Electronic Industry Press. ISBN 978-7-121-12456-3.
^ (PDF). University of Arizona. [2013-07-12]. ( Original content (PDF) archived on 2014-02-11).
^ David Money Harris, Sarah L. Harris. . Machinery Industry Press. ISBN 978-7-111-25459-1.

external link

Background of the Algorithmic State Machine (ASM) Notation ( page archive backup , stored in)
Brief Introduction to ASM Charts ( page archive backup , stored in)
ASM++: a modern Algorithmic State Machine methodology for RTL designs ( page archive backup , stored in)

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