The finite state machine in VHDL

The core digital design: FSM (Finite State Machines, FSM)

There are two types of state machines, a first output Moore type state machine is completely determined by the variable; Mealy second type is output to the input and state variables are related to the state machine.

 

The method described by the state machine when the state transition diagram, may represent the state of the output and transitions to a state machine programmed according to the different types and FIG.

State by the state machine described as enumerated types, and then determines the state of the migration conditions in the process to complete programming the state machine.

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