Note the self-FPGA "finite state machine".

  "Finite state machine", a good code must master the skills.

  First state machine needs to make it clear how many states a total, followed by the state to draw diagrams, state diagrams based on the demand picture, broken down as much as possible to draw each state, if necessary, use state machines must draw the state diagram, FIG must draw state, must draw a state diagram, and finally to write code in accordance with the state of FIG.

State transition in the FPGA will be used "hot code"

For example: a hot code of three

parameter  IDLE = 3‘b001;

parameter state1 = 3’b010;

parameter state2 = 3‘b100;

Within each state only one remaining is 0 to 1, this will ensure that each need only read a bit changed and eliminate inaccurate signal clk and the D flip-flop appears.

Advantages and disadvantages of one-hot code

Advantages: accurate and reliable chip read signal.

Disadvantages: take up a lot of chip register resources.

 

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Origin www.cnblogs.com/verilogcode/p/11295037.html