Questions about the watchdog and system clock of CC2652

watchdog

It can be configured in the UI of CCS's syscfg, as shown below

 If you want to see related routines, you can click the question mark next to the watchdog at the top.

Related questions:

1. The header file of hw_wdt is not added in the routine, and you need to #include <ti/devices/cc13x2_cc26x2/inc/hw_wdt.h>, otherwise it will show that there is no WDT_O_VALUE definition when getting the current DWT count value;
2. When configured as Watchdog_RESET_OFF, Watchdog_clear is useless;
3. When Watchdog_clear is performed during single-step simulation, the WDT counter is still decrementing, but it is cleared successfully during full-speed simulation;
4. After Watchdog_close, an interrupt will be entered;
5. If the watchdog callback function is not specified, it will be automatically reset;
6. The relevant reference is at /ti/simplelink_cc13x2_26x2_sdk_5_20_00_52/docs/drivers/doxygen/html/_watchdog_8h.html
7. Once the watchdog is turned on, it cannot be turned off
8. Note the difference between the abbreviations DWT and WDT

Code:

    // 看门狗配置，非异常复位用
    Watchdog_Params params;
    Watchdog_init();
    Watchdog_Params_init(&params);
    params.resetMode = Watchdog_RESET_ON; //Watchdog_RESET_ON会溢出复位
    params.callbackFxn = (Watchdog_Callback) DOGCallbackFxn;
    watchdogHandle = Watchdog_open(CONFIG_WATCHDOG_0, &params);
    if (watchdogHandle == NULL) {
       // Error opening Watchdog
       while (1);
    }

     // 看门狗测试程序
    uint32_t wdt_reg_value = WDT_BASE + WDT_O_VALUE;

    CPUdelay(800000);//基本功能测试
    wdt_val = HWREG(wdt_reg_value);
    Watchdog_clear(watchdogHandle);//清除测试 Watchdog_RESET_ON时可以
    wdt_val = HWREG(wdt_reg_value);
    CPUdelay(1000);
    wdt_val = HWREG(wdt_reg_value);
    Watchdog_close(watchdogHandle);//关闭测试 无法关闭
    wdt_val = HWREG(wdt_reg_value);
    CPUdelay(1000);
    wdt_val = HWREG(wdt_reg_value);
    Watchdog_open(CONFIG_WATCHDOG_0, &params);//打开测试
    CPUdelay(1000);
    wdt_val = HWREG(wdt_reg_value);

system clock

1. The SysTick counter runs on the system clock. If this clock signal is stopped in low-power mode, the SysTick counter will stop;
2. The counter does not decrement when the processor is stopped for debugging;
3. There is no function that immediately reloads the current count value. You need to control it yourself, that is, force writing to NVIC_ST_CURRENT;
4. In the case of 48M, the 30ns system clock increases by one unit

Code:

    SysTickEnable(); //SysTick测试
    SysTickIntEnable();
    SysTickPeriodSet(0);
    while(1)
    {
        wdt_val = SysTickValueGet();
        nsdelay(800000); //30ns一个值
        HWREG(NVIC_ST_CURRENT) = 0;//强制重载测试
        nsdelay(800000);
    }