Gowin USB Downloader Emulator User Manual (including how to use the online logic analyzer)

Gowin USB Emulator User Manual

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1. Introduction

The emulator is used for FPGA produced by GOWIN Company and can be used for program download and debugging. The main features are as follows:

1. Supports wide voltage 1.2V - 3.6V;
2. The speed can reach up to 30Mb/s, and the download and waveform debugging functions can be completed extremely quickly;
3. Perfectly supports online logic analyzer;
4. With over-current protection and TVS protection, it is more reliable to use;
5. Equipped with high-speed flexible USB cable, good use effect;

2. Development environment

1. No need to install separate drivers, supports GOWIN FPGA Designer development environment, Gowin Programmer software, etc.;
2. Support GOWIN’s full range of FPGAs;
3. Support operating system Windows7/8/10, etc.;

3. Kit list

1. GOWIN USB emulator host
2. High quality USB2.0 cable
3. Adapter board
4. Bundle and arrange some cables

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4. JTAG interface definition

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5. Software download

1.Develop software

You can download the latest version directly from Gowinsemi’s official website:
http://www.gowinsemi.com.cn/faq.aspx
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2. Burn the software separately

If you do not need a development environment, you can directly download the separate programming software
http://www.gowinsemi.com.cn/faq.aspx
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3.license application

1) Apply on the official website
http://www.gowinsemi.com.cn/faq_view.aspx

2) If you already have a Gowin agent, you can contact them to apply;
3) If you haven’t contacted a Gowin agent yet, our engineers can also help you apply;
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6. Emulator installation and download

1. Connect the power supply of the development board and the emulator USB cable, and turn on the power switch of the development board, as shown below

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2. Open the download tool

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3. If there is only one emulator connected to the computer, you can keep the default. If there are multiple emulators, you need to select them in the pop-up dialog box.

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4. Automatically scan devices

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5. When the device is recognized, select the corresponding device and double-click the operation column.

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1) If the FPGA uses on-chip FLASH, press the selection mode set above and select the fs file to be downloaded.
Note: Our demo development board uses on-chip FLASH
2) If it is off-chip SPI FLASH, please select it as shown below
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Note: In the Device column, if you cannot find the corresponding model, please select it as shown below.
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6.Download

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download successful

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7. Steps for using the emulator online logic analyzer

Use the GW1N-LV9LQ144 development board as a demonstration board, use the test routine, and observe the timing waveforms through online simulation.

1. Open the project

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2. Create a new simulation configuration file

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3. After the new creation is completed, a .rao file will be generated

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4. Double-click the fpga_project.rao file to enter the configuration interface

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It can support up to 16 trigger ports. We only select the first one and double-click "Trigger Port0" to add a trigger signal.

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Select key1_out, the flag signal of key 1 pressed.

5. Configure trigger conditions, tick M0, and then double-click to configure.

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Configure expressions: Double-click the blank position of Expressions and the following window will pop up. Because it is not related to other channels, only M0 is selected here.

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6. Configure the signals that need to be monitored

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7. After the configuration is completed, click Save and recompile the project.
8. After the compilation is completed, open the download tool, you can set the program to run in SRAM, select the fs file as the newly generated file, the default is ao_0_fs

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Note: ao_0.fs is a downloaded file with online capture data, so we observed that the ao_0.fs file is larger than the fpga_project.fs file.

9.Download the program

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10. After the download is completed, open the online analysis tool

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11. After opening the simulation interface, click Loop Trigger

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At this time, press the scan button of the development board, for example, press button 1, and the waveform interface will be triggered, as shown in the figure below:

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The above is the operation process of the online logic analyzer. For more detailed configuration instructions, please see the official document "SUG114-2.4_Gowin Online Logic Analyzer User Guide"

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Origin blog.csdn.net/Moon_3181961725/article/details/132778800