1. Bias circuit design for RF power amplifier design
In the design process of RF power amplifiers, the design of the bias circuit is a very important part.
In general design, the design requirement of the bias circuit is to isolate the interference of the radio frequency signal to the power supply, so a quarter-wavelength line is often used for design.
The specific process is to first use a capacitor to short-circuit the RF signal to ground, and then connect a quarter-wavelength line to change the impedance, thereby opening the RF signal, thereby using high impedance to prevent the RF signal from entering the power supply.
However, there are often some problems in the way of using capacitors to open the circuit. First, capacitors are devices that need to be soldered, and the location of the soldering will affect the performance of the equipment. Secondly, capacitors have a fixed resonant frequency. It is often troublesome to choose a suitable high-frequency capacitor.
Here fan-shaped microstrip lines are used for design ( sector-shaped microstrip lines are equivalent to ground capacitance ).
1 Design requirements
Here we design a class F power amplifier to design a bias circuit, which requires open circuits for fundamental waves and odd harmonics, and short circuits for even harmonics. Generally speaking, the bias circuit of Class F power amplifier can also be used in general power amplifier design circuit, and its specific requirements are as follows:
Center frequency: 2.4Ghz
fundamental wave to ground open circuit: fundamental wave to ground impedance > 10000 ohms,
second harmonic to ground short circuit: second harmonic to ground impedance < 1 ohm, third harmonic to ground
approximate open circuit: third harmonic to ground impedance > 200 ohms,
does not affect the passage of fundamental wave
2 Schematic design
Design according to the structural diagram of the initial theoretical part, and construct the following circuit schematic diagram:
TL2 is a quarter-wavelength line, and two fan-shaped microstrip lines work at the fundamental frequency and the second harmonic frequency respectively, so that the fundamental wave and the third harmonic of port 1 are open, and the second harmonic is short-circuited. The circuit is simulated and tuned, and the following results are obtained:
As can be seen from the above figure, the schematic diagram simulation can basically meet the design requirements, and the layout simulation is performed on it.
3 layout simulation
The Rogers4350B board is used here, and its parameters are 3.66 and 0.0037. Set it reasonably and add relevant ports to build the following schematic diagram: Generate the circuit board diagram in
this program, and it will look like this after generation:
Set the layout of this layout. The specific details will not be described in detail. The basic parameters are as follows:
After all settings, click the simulation button to simulate the layout
.
4 Layout co-simulation
Create a new schematic diagram for layout co-simulation test, insert the previously generated symbol and related controls:
choose to use emModel as simulation data:
After setting the frequency sweep parameters, click the simulation button to simulate and get the following results:
It can be seen from this that the designed bias circuit works well and can meet the requirements, but in most cases the schematic simulation results are not consistent with the layout simulation results, and fine-tuning is required.
For example, the center frequency of the layout simulation results is shifted by 100Mhz to 2.5Ghz, then I need to adjust the schematic simulation results to 2.3Ghz when designing the schematic diagram, so that it is more likely to get 2.4Ghz results during layout simulation.