16. Class AB power amplifier design of ADS use record

16. Class AB power amplifier design of ADS use record

Based on CGH40010F

0. Source file download

Class AB power amplifier design of ADS use record

The actual type of power amplifier obtained is not strictly a class AB power amplifier, but its waveform is more like an inverse EF power amplifier. The reason is that the harmonic conditions were not limited when the parameter OPTIM was used before, which led to the final control of the harmonics and caused the waveform to deviate from the original design. This article will not modify this

Addendum: The author is also a student. During the study, I found that the type of power amplifier in many papers is not determined by the final actual waveform, but by the original design method. For example, the class AB power amplifier was supposed to be designed this time, but the actual output waveform after tuning and optimization is far from that of Class AB, but it should still be called Class AB, right?

1. Design indicators

Center frequency 2.4Ghz
Bandwidth: 200Mhz
Output power: 10w (40dbm)
Return loss: less than -15db
PAE: greater than 50%
TOI/IP3: -45dbm

2. Data sheet

3. DC analysis + static working point selection

Import the CGH40010F model file, choose to decompress the Design Kit for the first time, if it is not the first time, you can choose to manage the library file, I am not the first time to use here: choose to add the library definition file: find the defs file in the root directory of the model decompression, click to open the import library: the new schematic is named 01_DC_SIMULATION (this schematic is used for DC scanning): select Insert in the menu bar, and insert image description here
insert
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the
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template
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:

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Inserted here is my custom template:
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After insertion, it is as follows (generally, the corresponding voltage needs to be set according to the data sheet when inserting a template, and the template inserted here has already been set, such as the frequency sweep parameters here): Click on the simulation observation result directly: You can directly select m2 in the figure as the static operating point. At this time, the conduction angle is 256
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degrees
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. The relevant parameters of m2 here are working voltage 28V, working current 211mA, gate voltage -2.7V.

4. Stability analysis

When designing an LNA, this method of adding a series resistor to the gate to improve stability cannot be used.
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5. Load pull and source pull

Select the first amplifier in the design wizard:
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find the load-pull template (Load Pull, etc.) in the amplifier category, here use the Xdb Gain Compression template: open
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it, insert the relevant device (with stability measures) and set the parameters; click to run the simulation, observe the data results,
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so you can get better efficiency when the output impedance is 19+11.25 ohms. The highest efficiency is obtained at 5.3-j*3.5 ohms :
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6. Performance analysis under good matching

Use the self-created template to analyze the output performance at a single frequency, and pay attention to setting the port impedance as an ideal impedance parameter: the
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simulation observation results show that the power added efficiency at this time can reach about 64%, and the system works in the AB class mode:
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7. Matching circuit design

The matching circuit includes an output matching circuit and an input matching circuit. Here, matching is performed by automatically generating a matching circuit. The specific process can refer to: Fanwai 4: Automatic power amplifier output impedance matching design (matching to the 4th harmonic)

Here, a suitable output matching circuit is obtained by using the template of the automatically generated matching circuit: the
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matching circuit is simulated and found that the 1-4 harmonics are well matched: the input
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matching design is carried out in the same way, after the design is completed, the matching circuit is packaged as a symbol, and the main schematic diagram is inserted after the packaging is completed: the parameter OPTIM is set in the main schematic diagram, and the corresponding Goal is set. After a period of time, the system obtains suitable circuit parameters. microstrip
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circuit
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. Here, the microstrip line calculation tool that comes with ADS is used for conversion: insert image description here
for the input matching circuit, the length and width of each microstrip line are calculated separately, and the final converted circuit is obtained. The following is the comparison between the ideal microstrip line parameter circuit diagram and the actual microstrip line circuit diagram: in the actual microstrip line circuit diagram, the corresponding transformation section (ladder) needs to be added at the intersection of the microstrip line and the impedance change. used as pads
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. For the output matching circuit, use the same method to design, skip the design steps here, and get the circuit diagram as follows: put the
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actual microstrip line circuit into the main schematic diagram for simulation, we may not be satisfied with the obtained results. Here, the OPTIM function is used again to adjust the parameters twice, and the adjustment is completed after a period of time. Get the final result graph ( you can see that the current waveform is more like a square wave, and the voltage waveform is similar to a half-sine, so the actual power amplifier type obtained at this time is not strictly a class AB power amplifier, but more like an inverse EF power amplifier. The reason is that the harmonic conditions were not limited when the parameter OPTIM was used before, which led to the final control of the harmonics and caused the waveform to deviate from the original design. This article will not modify this) :insert image description here

It can be seen that the final efficiency PAE in practice is about 60%, the large signal gain is about 12db, the performance of S11 and S22 with output matching and input matching is good, and all parameters meet the design requirements.

7. Intermodulation performance analysis

Transpose the single-tone harmonic balance analysis in the original main schematic diagram to multi-tone harmonic balance analysis, insert relevant IP3 calculation controls, and calculate IP3 for the upper and lower sidebands respectively: modify the input power to 20dbm to make the system work in a normal state, and simulate the above schematic diagram to obtain the IP3 performance of the circuit. It can be seen that the IP3 suppression ability of the system is greater than 45db, and the performance meets the design requirements (if the input power is too large, the output non-IP3 performance will drop)
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:
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8. Layout design

Name the new schematic diagram 09_PCBLAYOUT, copy all the circuits in it, delete the transistors, capacitors, and ports, and leave only the microstrip line: Select the PCB layout in the Layout option of the menu bar, and click Apply on the next pop-up interface: Arrange the input and output circuits reasonably, leaving the position of the
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transistor pad in the middle
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.
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To set EM directly here, you need to design the relevant parameters of the substrate first. Here, the plate 4350B is used, the thickness of the plate is 20mil, its parameter is 3.66, and the tangent loss angle is 0.0037: design the relevant scanning frequency parameters. Here, the 2.4Ghz single-point frequency simulation is mainly carried out, and the fifth harmonic of 2.4Ghz is considered
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. Perform a linear frequency sweep between 2-3Ghz to draw S parameters:
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Check in the output settings as follows: Check
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in the model settings as follows:
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After all settings are completed, click on the simulation. The simulation time is long, and the pop-up window can be closed after the simulation is completed.

9. Layout co-simulation

仿真完成后在EM设置窗口上方点击Symbol按钮创建新的模型:
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在弹出的Symbol生成器中如下设置,设置Source view为layout且symbol类型选择为look like:
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设置完成后点击确定即可生成SYMBOL:
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新建联合仿真原理图,将其命名为10_cosimulation,插入模板并连接相关器件,设置谐波平衡仿真的相关参数:
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点击仿真按钮左侧的choose view for simulation按钮,点击生成的版图symbol,选择为emmodel:
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全部设置完成后点击仿真按钮,可以看到波形还是挺好看的,漏极效率可达73左右:
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在原理图中开启扫描输入功率:
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开启频率扫描,发现在带内漏极效率大于百分之50,在2360-2500之间大于百分之70:

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Origin blog.csdn.net/weixin_44584198/article/details/123311752