foreword
In the field of storage, there is a concept of FTL, which is a Flash memory management algorithm , which belongs to the core secret of each manufacturer. Each manufacturer has different processing methods, some are simple, and some are complex.
FTL, that is, Flash Translations layer, that is, the flash translation layer, can complete the conversion from logical addresses to physical addresses, referred to as mapping.
Why do you need FTL
Because the quality of Flash is uneven , the broken area inside is not usable after completion.
The Host sends a command to store a piece of data in address A. At this time, A is the logical address, and it is hard to die. The address A in Flash happens to be a bad block, so what should I do?
At this time, the B address is good, and FTL will store the data in the B address. At this time, B is lost as the physical address, and at the same time, the A logical address - the B physical address is recorded. This record is the mapping relationship.
Next time, when the host needs to read the data of logical address A, FTL will read the data of physical address B and return it to the host.
The location of the FTL
Know a few nouns first
UCL
USB Control layer, the USB control layer, is mainly used to parse the USB commands sent from the Host.
FTL
Flash Translation layer, Flash translation layer, is mainly used to convert logical addresses into physical addresses.
FCL
Flash Control layer, the Flash control layer, is mainly used to resolve the mapped addresses into flash instructions and send them to Flash.
The location of UCL, FTL, FCL
Rules Followed by FTL
The memory management algorithm of FTL naturally follows the characteristics of Flash , and everything can only run under the characteristics of Flash.
- Write data with page as the smallest unit
- The written data must be disrupted for storage to be stable
- Only when the entire block data is filled will it be stable
- Erase takes Block as the smallest unit, and it is generally not easy to erase the entire block
Of course, there are other characteristics, but due to different batches, manufacturing processes and manufacturers of Flash, the flashes that leave the factory also have some different characteristics. These are actually analyzed based on actual problems.
Various tuning in FTL
Different manufacturers have different FTl solutions. In addition to the logical address and physical address mapping function, a good FTL also has the following tuning:
Mapping Granularity
There are two ways of mapping between logical addresses and physical addresses: block mapping and page mapping.
Using block mapping, logical blocks are mapped to physical blocks, which looks good, but if you encounter the situation of operating pages, for example, if you want to modify a page in a block that has just been filled, you often need to erase the entire block , greatly reducing the efficiency.
Using page mapping, although it makes up for the above problems, but if each page is mapped, the number of pages is large, and there are many mapped pages. You must know that storing the mapping relationship also consumes memory. Page mapping consumes a lot of space.
Therefore, most of the methods on the market adopt: block mapping + page mapping, referred to as hybrid mapping , which can not only meet the storage requirements, but also maintain with page particles.
Mapping table storage
The mapping table can be changed at any time, and it is also used at any time . Generally, it is used in RAM when it is used, and it needs to be stored when it is not used. It is usually stored in some free blocks. These free blocks do not store data. Just put the mapping table.
merge processing
In the field of storage, data handling is indispensable. Generally speaking, merge and GC work together.
GC recovery
Now no matter what will involve some garbage collection, memory is always a point to consider for a good algorithm.
Garbage collection needs to choose a good timing. No one wants a storage device to start GC collection after there is no usable memory. This is like starting a period of lag with no progress at all.
Good firmware often takes precautions and does a good job of GC recovery without knowing it.
life balance
The mapping of logical and physical addresses itself has a positive effect on lifespan balance .
As mentioned just now, the mapping table can be modified at any time, so the physical address corresponding to the logical address will also be modified, and some physical blocks are often erased, which often accelerates damage.
We can avoid frequently erasing the same physical block by modifying the logical block so that the physical block is different each time, which itself ensures that no physical block will be frequently erased.
But there is one situation that it can't deal with, that is, idle data blocks, which have not been changed after being written, occupy some physical blocks all the time, and these physical blocks have a long life, while other blocks are rapidly being worn out.
Faced with this situation, we can only change their positions at the right time. How to choose this time is very important, and the merge movement itself will also consume life itself.
These strategies are also the essence of each FTL algorithm.
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