0 Preface
Chips related to intelligent driving are mainly divided into two categories: automatic driving chips (edge end) and smart cockpit chips . In addition, related chip types include computing cluster chips (cloud),
1 Self-driving chip combing
At present, the representative intelligent driving chip products in the industry are sorted out as follows.
1.1 Autonomous Driving Chip Solution
At present, the integrated solutions for autonomous driving and parking in the market basically use the strategy of multiple SoCs. Common combinations include low computing power TDA4 * 2 solutions, TDA4 + 3J3 solutions, high computing power Orin * 2 (*4) solutions, MDC610 * 2 schemes, etc. How multiple SoCs work together is a very interesting question. Today, I will explain TI’s dual TDA4 scheme. The ideas in it can help understand other multi-SoC schemes.
Why do multi-SoC solutions?
Why use multiple SoCs is usually based on the following points:
a. Performance needs to
run various general-purpose calculations, deep learning calculations and applications may exceed the capabilities of a single SoC. In addition to the lack of computing power, in practice In the application, there will also be problems such as hardware overheating and crash caused by long-term high-power computing. Therefore, some vehicle manufacturers will also consider the problem of load rate/utilization rate (not the higher the better) when evaluating the solution provider’s solution. Specifically expand.
b. Functional safety considerations
In order to meet the functional safety requirements in specific situations, it is necessary to add a SoC as the bankup when the main SoC fails to work normally due to abnormality. This involves the consideration of redundant backup, and correspondingly derives homogeneous redundancy and heterogeneous There are two schemes for structural redundancy, each with its own advantages and disadvantages, and will not be elaborated in detail.
c. IO interface restrictions
In various ADAS applications with increasingly high integration, the number of applications of various sensors continues to increase, and the performance is also continuously enhanced. Therefore, the number of communication interfaces and bandwidth requirements are also increasing. A single SoC It may not be able to meet the demand for the number of interfaces. The early ADAS solution has a typical 5R1V, and now the more popular solution is 5R8V12U3L. The number of sensors has doubled, and the requirements for the number of various interfaces have also greatly increased. The data bandwidth requirements caused by the improvement of hardware performance Compared with the early days, it is no longer the same;
in addition, in terms of dealing with performance bottlenecks alone, some manufacturers are doing time-sharing multiplexing of a single SoC (doing driving calculations when driving, and parking calculations when parking) is also a solution The scheme can realize the integration of low computing power SoC and parking, and no specific development will be made.
1.2 Summary of Mainstream Chips and Equipped Models
Chips related to intelligent driving are mainly divided into two categories: automatic driving chips (edge end) and smart cockpit chips. In addition, there are related chip types derived from computing cluster chips (cloud). At present, the industry's representative smart driving chip products are sorted out as follows.
1.3 The greater the computing power ≠ the better the effect
When analyzing the reasons why Nvidia dominates the AI chip market and its stock price soared 20 times in five years, analysts tend to throw out a point of view hastily: computing power is king. When car companies promote smart cars, they often convey an idea to users intentionally or unintentionally: the greater the computing power, the better X. But this is not true. In a real intelligent driving system, greater computing power only provides great possibilities, but does not guarantee great certainty. On the one hand, the TOPS that enterprises usually publicize is the peak AI computing power of a chip, but in actual operation, it is difficult to fully utilize the computing power of a chip.
A lesser-known fact is that in high-data-volume computing tasks, the biggest bottleneck is often storage bandwidth rather than computing power. Because the operating frequency of the computing unit is much higher than that of the storage unit, the chip will fall into the state of "computing power and other data", and the high computing power is actually idling [5]. This is equivalent to having a Michelin chef in the restaurant, who cooks fast and delicious food, but due to the efficiency of the vegetable cutters, the meal delivery rate has not been able to increase.
Storage capacity has become the main bottleneck of AI applications. One way to effectively use high computing power is to place more cache memory (SRAM) in the chip. This kind of storage unit is closer to the computing unit, and the delay of data transmission is lower, which can effectively Increase bandwidth. For example, Tesla has packaged a 32MB high-speed cache in its FSD chip, and the cache bandwidth reaches 2TB/s, which increases the number of images that can be processed per second from more than 100 frames of Drive PX2 to 2300 frames, providing a basis for its FSD Beta algorithm .
But the premise for Tesla to do all this is to spend huge sums of money to find top semiconductor talents from Silicon Valley for independent research and development, and there are not many car companies that can meet such conditions at the same time. On the other hand, even if the computing power of the chip is used as much as possible through various methods, it does not mean that everything will be fine- computing power is the basis of intelligent driving, and algorithms are the soul . Regarding the importance of algorithms, there is a vivid example in the game industry. Before 2021, when gamers open the online version of GTA5, even if they have a computer with good performance, they will have to wait for a long time. Later, some programmers unpacked and found that due to the low quality of some codes, a step that only needs to be completed in one step was forced to run 1.98 billion if statements-this code is very simple, but it takes up 60% of computing resources[ 7]. The same principle is also true in the intelligent driving industry: it is not difficult to pile up and consume computing power, but it is difficult to transform computing power into a real user experience through efficient algorithms.
An experienced algorithm team can often achieve higher computing power cost-effectiveness. For example, Xpeng has just pushed CNGP, a high-level city-level driving assistance system, to the P5 models in the Guangzhou area. When most of the industry achieves this goal based on hundreds of T computing power, the Xpeng P5 is only equipped with a Xaiver chip with a computing power of 30TOPS, which is easy to rely on. It is algorithm optimization and high-precision map blessing [8]. DJI Automotive, which recently launched a low-computing assisted driving solution with Wuling, believes that the realization of intelligent driving faces four mountains of sensors, computing power, algorithms, and data, and the four mountains need to be overcome together. In other words, the intelligent driving system is actually a wooden barrel, and what determines the final experience is not a long board, but a short board. At present, there are many people in the entire automotive industry who pile up chip computing power to hundreds or even thousands of terabytes, but no car company's assisted driving system is as effective as Tesla's FSD Beta based on 144T computing power. . Faced with this situation, it is difficult to say that the short board of the intelligent driving industry lies in the chip computing power.
In the vast assisted driving market, the more mainstream is actually enough to serve low-end and mid-range models. They do not pursue (and cannot afford to use) high-end configurations, but use low-cost chips and sensors to perform assisted driving functions in limited scenarios. For example, the smart driving version KIWI EV jointly launched by DJI and Wuling this year goes a step further, using a 2-megapixel camera as the main sensor, a computing platform with a computing power of only 16T, and a complete set of assisted driving kits costing less than 10,000 yuan. With the popularity of such solutions, some cheap smart driving chips such as Horizon J3 (computing power 5T) and Texas Instruments TDA4 (computing power 8T) are opening up a larger and larger market.
Reference link:
https://zhuanlan.zhihu.com/p/579801405
https://baijiahao.baidu.com/s?id=1748172256217137711&wfr=spider&for=pc
https://www.elecfans.com/qichedianzi/1901545.html