The article is transferred from: The difference between push-pull output and open-drain output of MCU I/O port (transfer)
Push-pull output: can output high and low levels, connect to digital devices;
Open-drain output: The output terminal is equivalent to the collector of the triode. To get a high-level state, a pull-up resistor is required. It is suitable for current-type driving, and its ability to absorb current is relatively strong (generally within 20ma).
Push-pull structure Generally, it means that two triodes are controlled by two complementary signals respectively, and the other is always turned off when one triode is turned on.
Let's first talk about the structure of the open collector output. The structure of the open-collector output is shown in Figure 1. The collector of the transistor on the right is not connected to anything, so it is called open-collector (the transistor on the left is used for inversion, so that when the input is "0", the output is also "0" 0”). For Figure 1, when the input at the left end is "0", the front triode is turned off (that is, the gap between the collector C and the emitter E is equivalent to disconnection), so the 5V power supply is applied to the right triode through a 1K resistor, and the right The triode is turned on (that is, equivalent to a switch being closed); when the input at the left end is "1", the front triode is turned on, and the rear triode is turned off (equivalent to the switch being turned off).
We simplify Figure 1 to look like Figure 2. The switch in Figure 2 is controlled by software and is open when "1" and closed when "0". It is obvious to see that when the switch is closed, the output is directly connected to ground, so the output level is 0. When the switch is turned off, the output terminal is left floating, that is, a high-impedance state. At this time, the level state is unknown. If a resistive load (even a very light load) behind it is connected to the ground, then the level of the output terminal will be pulled to a low level by this load, so this circuit cannot output a high level.
See Figure 3 again. The 1K resistor in Figure 3 is the pull-up resistor. If the switch is closed, there will be current flowing through the 1K resistor and the switch, but because the switch is closed and the other three ports have internal pull-up), when we want to use the input function, we only need to set the output port to 1, which is quite Because the switch is disconnected, and for the P0 port, it is a high-impedance state.
For open-drain (OD) output, it is very similar to open-collector output. Replace the above triode with a field effect transistor. In this way, the collector becomes the drain, and the OC becomes the OD. The principle analysis is the same.
Another output structure is the push-pull output. The structure of push-pull output is to replace the upper pull-up resistor with a switch. When a high level is to be output, the upper switch is turned on, and the lower switch is turned off; and when a low level is to be output, it is just the opposite. Compared with OC or OD, such a push-pull structure has strong high and low-level drive capabilities. If two output ports with different output levels are connected together, a large current will be generated, and the output port may be burned out. This is not the case with the OC or OD outputs mentioned above, because the current provided by the pull-up resistor is relatively small. If the push-pull output is to be set to a high-impedance state, the two switches must be turned off at the same time (or a transmission gate is used on the output port), which can be used as an input state. Some IO ports of AVR microcontrollers have this structure.
The open-drain circuit has the following characteristics:
1. Utilize the drive capability of the external circuit to reduce the drive inside the IC (or drive a load higher than the power supply voltage of the chip). When the IC's internal MOSFET is turned on, the drive current flows from the external VCC through R pull-up, MOSFET to GND. Only very low gate drive current is needed inside the IC. Figure 1.
2. Multiple open-drain output pins can be connected to one line. Form an "and logic" relationship. As shown in Figure 1, when any one of PIN_A, PIN_B, and PIN_C goes low, the logic on the open-drain line is 0. This is also the principle of I2C, SMBus and other buses to judge the bus occupancy status. If it is used as an output, a pull-up resistor must be connected. When a capacitive load is connected, the falling delay is a transistor in the chip, which is an active drive, and the speed is fast; the rising delay is a passive external resistance, and the speed is slow. If high speed is required, the resistor selection should be small, and the power consumption will be large. Therefore, the choice of load resistance should take into account power consumption and speed.
3. The transmission level can be changed by changing the voltage of the pull-up power supply. As shown in Figure 2, the logic level of the IC is determined by the power supply Vcc1, and the output high level is determined by Vcc2 (the power supply voltage of the pull-up resistor). In this way, we can use low-level logic to control the output high-level logic (so you can do any level conversion). (For example, adding a pull-up resistor can provide TTL/CMOS level output, etc.)
4. If the open-drain Pin is not connected to an external pull-up resistor, it can only output a low level (so for the P0 port of the classic 51 single-chip microcomputer, an external pull-up resistor must be added to perform the input and output function, otherwise it cannot output a high level. level logic). Generally speaking, open-drain is used to connect devices of different levels and to match the levels.
5. Standard open-drain pins generally only have output capability. Add other judgment circuits to have the ability of two-way input and output.
6. The normal CMOS output stage is the upper and lower two tubes, remove the upper tube and it is OPEN-DRAIN. There are two main purposes of this output: level shifting, line AND.
7. The line AND function is mainly used in situations where there are multiple circuits that pull down the same signal. If the circuit does not want to pull down, it will output a high level, because the tube on the OPEN-DRAIN is removed, and the high level is It is achieved by an external pull-up resistor. (In the normal CMOS output stage, if one output is high and the other is low, it is equivalent to a short circuit of the power supply.)
8. OPEN-DRAIN provides a flexible output method, but it also has its weakness, which is the delay of the rising edge. Because the rising edge charges the load through an external pull-up passive resistor, when the resistor is selected small, the delay is small, but the power consumption is large; otherwise, the delay is large and the power consumption is small. Therefore, if there is a requirement for delay, it is recommended to use falling edge output.
Attention should be paid to the application:
1. The principle of open-drain and open-collector is similar. In many applications, we use open-collector circuit instead of open-drain circuit. For example, an input Pin is required to be driven by an open-drain circuit. Then our common driving method is to use a triode to form an open collector circuit to drive it, which is convenient and cost-effective.
2. The value of the pull-up resistor R pull-up determines the edge speed of the logic level transition. The larger the resistance value, the lower the speed and the lower the power consumption. vice versa.
Push-Pull output is generally referred to as push-pull output. It should be more suitable than CMOS output in CMOS circuits, because the push-pull output capability in CMOS cannot be as large as bipolar. The output capability depends on the area of the N and P tubes inside the IC. Compared with the open-drain output, the high and low levels of the push-pull are determined by the power supply of the IC, and cannot simply do logic operations. Push-pull is the most used output stage design method in CMOS circuits.
Of course, open drain is not without cost, which is the poor driving ability of the output. It is not accurate to say that the drive capability of the output is poor, the drive capability depends on the power of the final transistor in the IC. OD only brings the delay of the rising edge, because the rising edge charges the load through an external pull-up passive resistor. When the resistor is selected small, the delay is small, but the power consumption is large. On the contrary, the delay is large and the power consumption is small. OPEN DRAIN provides a flexible output method, but it also comes at a cost. If the delay is required, it is recommended to use the falling edge output.
The premise of small resistance and small delay is that the principle of resistance selection should be within the allowable range of power consumption of the final stage transistor. When using logic chips, experienced designers will not choose a 1-ohm resistor as a pull-up resistor. On the rising edge of the pulse, the power supply charges the load through the pull-up passive resistor. Obviously, the smaller the resistance, the shorter the rise time. On the falling edge of the pulse, in addition to the load being discharged through the active transistor, the power supply also passes through the pull-up resistor and the conductive The transistor forms a path to the ground, and the problem is the power consumption and power consumption of the chip. The resistance affects the rising edge, not the falling edge. If you don't care about the rising edge in use, the pull-up resistor can be selected as large as possible to reduce the current to the ground path. If the rising edge time is required to be high, the selection of the resistor size should be based on the power consumption of the chip.