Finishing | Su Mi
Exhibit | CSDN (ID: CSDNnews)
Recently, another good news came. Alibaba’s T-Head Semiconductor Company (T-Head) officially announced in its official chip open community that the Android system supporting RISC-V architecture is coming, and the code is open source (https://github. com/T-head-Semi/aosp-riscv)!
As we all know, the Android system previously only supported a few instruction set architectures (ISA), such as ARM and x86. However, a few years ago, on the one hand, Intel had already abandoned the mobile phone CPU market. On the other hand, NDK used to support ARMv5 (armeabi) and 32-bit and 64-bit MIPS, but NDK r17 is no longer supported. Therefore, in the current market, Android is running Most of the operating systems of smart phones, tablets, TVs, smart watches and other devices are based on ARM chip designs.
For a long time, Google has not officially provided the open source RISC-V ISA hardware-based Android compilation support, but some development teams such as Pingtou continue to concentrate on the possibility of running AOSP on RISC-V hardware. Now that Pingtou brother announced the landing of this achievement, it is undoubtedly a milestone event in the development history of RISC-V in China.
In fact, a few months ago, the PLCT Laboratory (full name: Programming Language and Compiler Technology Laboratory) under the Intelligent Software Research Center of the Institute of Software of the Chinese Academy of Sciences announced on its official blog (https://plctlab.github.io/aosp /create-a-minimal-android-system-for-riscv.html), has successfully run Android "minimal system", the so-called "minimal system" on RISC-V's QEMU (an analog processor that distributes source code under the GPL license) "Means "bootable Unix-style command line operating system", they named the project "AOSP for RISC-V", GitHub address: https://github.com/aosp-riscv.
Initially based on the project, they also set a short-term goal: "based on the RISC-V platform, realize the kernel part of Android running on QEMU, and run the Android Shell." (Based on the RISC-V platform, realized on QEMU Run the Android kernel part and run Android Shell commands.)
Source: https://plctlab.github.io/aosp/create-a-minimal-android-system-for-riscv.html
At present, this small goal has been achieved, and a simple Android system can be successfully run on the RISC-V architecture. Among them, it is worth noting that the ICE EVB used is a high-performance SoC board based on Xuantie C910, developed by the team of Pingtou.
ICE SoC integrates 3 Xuantie C910 cores (RISC-V 64) and 1 GPU core, with high cost performance, high speed, high intelligence and other characteristics. The chip can provide 4K@60/AVC/JPEG decoding capabilities, as well as a variety of high-speed interfaces and peripherals for control and data exchange; suitable for 3D graphics, visual AI and multimedia processing.
Because RISC-V is open source and has an open ISA, any developer can use it freely, and anyone is allowed to design, manufacture, and sell RISC-V chips and software. RISC-V greatly reduces the entry barrier for some companies to design chips. With the rise of the Internet of Things, many domestic companies have also chosen to embrace RISC-V. For the open hardware community, RISC-V can successfully run the Android system, which is undoubtedly an exciting thing.
For more details, see:
- https://github.com/T-head-Semi/aosp-riscv
- https://www.xda-developers.com/android-risc-v-port/
- www.xda-developers.com/android-risc-v-port/
- https://plctlab.github.io/aosp/create-a-minimal-android-system-for-riscv.html