BUS
The simplest bus structure is a single bus. The disadvantage of a single bus is that low-speed signals drag the speed of high-speed signals on the "lane". Therefore, a multi-bus structure separates low-speed signals into a set of separate buses.
Address bus AB
unidirectional
Data bus DB
Two-way
Control bus CB
Two-way
DMA（Direct Memory Access）
Direct memory transfer
refers to the direct transfer of data between the I/O interface and the memory without passing through the CPU.
Questions
- Do three buses refer to AB, DB, CB? The relationship between AB, DB, CB in dual/triple bus
The multi-bus structure does not mean that the bus is divided into three types: AB, DB, and CB, but each set of bus includes these three types of AB, DB, and CB buses
- C1PPT section? The page says that after receiving the data, the data receiver needs to give the data sender a response, similar to the TCP handshake method, but how does AB receive the response as a one-way bus?
When I was in class, I never wanted to understand. After the get out of class, I asked the teacher and combined the above questions to realize that AB alone is not a set of buses, so in a set of bus structure, you can receive responses through other bidirectional buses.
- Why does the address signal of the xx bus need to be latched?
Because the address line and data line are time-division multiplexed.
- In the timing diagram, some signal lines are two jumpers with slashes (SA, SD), and some are one line?
Because some are a single signal, two lines indicate that it is a composite signal, such as an address line and a data line. This multi-bit signal is fused together to indicate this.
- On page 71 of C1PPT, the digits of AL and DX in IN AL and DX instructions are not the same. How to choose the digits?
This instruction does not mean that the contents of the register DX are placed in the register AL. If this is the case, it is necessary to consider the choice or conversion of the number of bits; however, it refers to the contents of the register corresponding to the DX address in the register AL, and these two The number of bits of the register is exactly the same, no need to choose.
6. It is written in C2 PPT P73 that the busy flag bit occupies a digit on the system data bus. By analogy, there is also a ready signal, so at this time, should I add another bus width? ?
Some devices are only responsible for input or output, such devices only need one place; if a device needs to input and output, it will inevitably need two digits, and only one data bit can be added, such as a ready signal Occupy the data line D7 and the busy signal occupy the data line D8. Before the signal starts to be transmitted, these two flag signals play a role, and they will be time-division multiplexed in the subsequent transmission, which will not cause conflict with the data transmission on the data line.
