ARM basics
1. Basic knowledge of embedded system
1.1 Definition of Embedded System
Embedded system refers to a special-purpose computer system that is application-centric and based on computer technology, software and hardware can be tailored to meet the strict requirements of the application system for function, reliability, cost, volume, and power consumption.
1.2 The composition of the embedded system
The embedded system is generally composed of hardware and software. Hardware is its foundation and software is its core and soul.
Embedded system hardware devices include:
- Embedded processor: ARM, PowerPC, MC68000, MIPS, etc.
- Storage devices: RAM, SRAM, SDRAM, ROM, EPROM, EEPROM, Flash,
- Communication equipment: RS232, SPI, IIC, Ethernet, etc.
- Display device: display screen, etc.
Embedded system software includes:
- Application layer (Application)
- Kernel layer (Kernel, only with operating system)
- Driver
- Hardware layer (Hardware)
1.3 Overview of Embedded System Development
Embedded system development is mainly divided into three parts: overall system development, embedded hardware development and embedded software development. The overall flow chart is shown below
2. ARM basic knowledge
2.1 Know ARM
ARM was established in November 1990, formerly known as Acorn Computer Company. ARM is mainly involved in the ARM series RISC processor cores and authorizes the ARM cores to partners who produce and sell semiconductors. ARM does not produce chips.
ARM architectures are: ARMv1, ARMv2, ARMv3, ARMv4, ARMv5, ARMv6, ARMv7, ARMv8 architecture, and different architectures use different instruction sets. The Harvard structure is that data and instructions are stored and run separately; the von Neumann structure is mixed storage.
The ARM product line is shown as follows:
ARM's memory system is composed of multiple levels, which can be divided into: kernel level, chip level, board level and peripheral level. The following figure shows the memory hierarchy
2.2 ARM working mode and registers
ARM mainly has 7 basic working modes
- User: Non-privileged mode, most tasks are executed in this mode
- FIQ: This mode is entered when a high priority (fast) interrupt is generated
- IRQ: This mode is entered when a low priority (normal) interrupt is generated
- Supervisor: This mode will be entered when the reset or soft interrupt instruction is executed
- Abort: This mode will be entered when the access is abnormal
- Undef: Enter this mode when executing an undefined instruction
- System: A privileged mode that uses the same register set as the User mode
ARM has 37 registers
- One is used as PC (Program Counter)
- 1 is used as CPSR (Current Program Status Register, current program status register)
- 5 are used as SPSR (Saved Program Status Registers, backup program status register)
- 30 general deposits
The figure above is a block diagram of ARM registers. The 37 registers specifically include:
| Register category | Register name | Description |
|---|---|---|
| Ungrouped register | R0 ~ R7 | The same physical register in all working modes |
| Group register | R8~R12 | Each register corresponds to two different physical registers, one group is dedicated to FIQ mode, and the other group is used for other modes |
| R13 | The SP register is often used as a stack pointer, and each exception mode has its own R13 | |
| R14 | LR connection register, each mode has its own R14 to store the return address of the current subroutine | |
| PC register | R15 | Used to store the address of the next execution instruction |
| Program status register | CPSR | Current program status register |
| SPSR | Backup program status register |
Bit allocation map in the CPSR register (and the SPSR register that saves it)
| Rank | meaning |
|---|---|
| Flag bit | N=1 means the result of the operation is negative; N=0 means the result is positive or 0 |
| Z=1 means the result of the operation is 0; Z=0 means the result is not 0 | |
| C carry flag (4 cases) | |
| V overflow flag (2 cases) | |
| Interrupt disable bit | I=1 means IRQ is prohibited |
| F=1 means FIQ is prohibited | |
| Status control bit | T=0 indicates that the processor is in the ARM state (32-bit ARM instruction); T=1 indicates the Thumb state (16-bit Thumb instruction) |
| Mode control bit | 10000 User；10001 FIQ；10010 IRQ；10011 Supervisor；10111 Abort；11011 Undefined；11111 System |