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2018/10/19号完成:
*Dedicated Coreset and searchSpace (--> put to #30 together with Coreset0/Css0)
*PUSCH resource allocation (with DMRS)
*Initial active DL BWP
*Dedicated active DL BWP
*Initial active UL BWP
*Dedicated active UL BWP
(6) PUSCH resource allocation (with DMRS)
struct NrDci00
{
NrRnti rnti;
int dciSlot;
NrSubcarrierSpacing scsPdcch;
NrSubcarrierSpacing scsPusch;
NrPuschTimeAlloc timeAlloc;
NrPuschFreqAllocType1 freqAlloc;
NrPuschFreqHopping fh;
};
struct NrDci01RaType0
{
NrRnti rnti;
int dciSlot; //n
int scsPdcch; //u_PDCCH of active DL BWP
int scsPusch; //u_PUSCH of indicated UL BWP or active UL BWP
int bwpIdAct;
int bwpIdIndicated;
NrPuschTimeAlloc timeAlloc;
NrPuschFreqAllocType0 freqAlloc;
int antPortsField; //the ‘antenna port(s)’ field of DCI 0_1
//RA type 0 doesn’t support transform precoding and frequency hopping
};
struct NrDci01RaType1
{
NrRnti rnti;
int dciSlot; //n
int scsPdcch; //u_PDCCH of active DL BWP
int scsPusch; //u_PDSCH of indicated UL BWP or active UL BWP
int bwpIdAct;
int bwpIdIndicated;
NrPuschTimeAlloc timeAlloc;
NrPuschFreqAllocType1 freqAlloc;
NrPuschFreqHopping fh;
int antPortsField; //the ‘antenna port(s)’ field of DCI 0_1
};
struct NrPuschTimeAlloc
{
int timeAssignField; //can be 0~15, the value of ‘Msg3 PUSCHTime domain resource assignment’ or ‘Time domain resource assignment’ field
int mappingType; //can be typeA or typeB
int k2; //K0, based on scs of PDSCH
int sliv; //can be 0~127
int startingSymb; //S of SLIV
int symbLength; //L of SLIV
};
enum NrPuschFreqHopping
{
//{disabled, intra-slot, inter-slot}
}
enum NrPuschTransformPrecoding
{
//{enabled, disabled}
}
struct NrDmrsPuschConfig
{
NrDmrsType type;
bool puschInDmrsSymb;
int addPos; //dmrs-additionalPosition, can be {pos0, pos1,po2, pos3}
int maxLength; //can be {len1, len2}
int rank; //can be 1~4
//NrPtrsPuschConfig ptrs;
std::vector<int> antPorts; //=1000 for DCI 1_0
int numCdmGroupsWoData; //can be 1~3
int frontLoadedSymbs; //the number of symbols for front-loaded DMRS
};
struct NrPtrsPuschConfig
{
//TODO
};
(7) Initial active DL BWP
struct NrInitialDlBwpCoreset0
{
NrCoreset0 coreset0;
NrCss0 css0;
NrSib1PdschConfig sib1;
};
Assume coreset0/css0 applies to initialDownlinkBWP IE of SIB1 as well.
struct NrInitialDlBwpSib1
{
NrBwpGeneric bwp; //bwpId=0, this bwp should fully contain CORESET0
NrCoreset0 coreset0;
NrCss0 css0;
NrType1PdschConfig msg2; //RAR
NrType1PdschCOnfig msg4;
};
struct NrBwpGeneric
{
int id; //bwp index, 0~3
NrSubcarrierSpacing scs;
NrCyclicPrefix cp;
int loctionAndBw; //can be 0~37949
int startingRb; //RB_start as specified by locationAndBw
int numRb; //L_RBs as specified by locationAndBw
};
(8) Dedicated active DL BWP
struct NrActDlBwp
{
NrBwpGeneric bwp; //bwpId=1
NrPdcchConfig pdcch;
NrType0PdschConfig type0Pdsch;
NrType1PdschConfig type1Pdsch;
};
struct NrPdcchConfig
{
NrCoreset coreset1; //coresetId=1
NrSearchSpace uss; //ssId=1, type=USS, dciFormats=DCI01_DCI11
};
struct NrType0PdschConfig
{
NrDci11RaType0 dci11RaType0; //rnti=C-RNTI
int aggFactor; //can be {1,2,4,8}, limited to a single layer transmission
int rbgConfig; //rbg-Size, can be {config1, config2}
int rbgSize; //the nominal size of RBG P
NrPdschDmrsConfig dmrs;
};
struct NrType1PdschConfig
{
NrDci10 dci10; //rnti=RA-RNTI(Msg2/RAR) or TC-RNTI(Msg4)
NrDci11RaType1 dci11RaType1; //rnti=C-RNTI
int aggFactor; //can be {1,2,4,8}, equal to 1 for DCI 1_0 with CSS0, limited to a single layer transmission
NrPdschDmrsConfig dmrs;
};
struct NrSib1PdschConfig
{
NrDci10 dci10; //rnti=SI-RNTI for SIB1
int aggFactor; // equal to 1 for DCI 1_0 with CSS0, limited to a single layer transmission
NrPdschDmrsConfig dmrs;
};
(9) Initial active UL BWP
struct NrInitialUlBwpSib1
{
NrBwpGeneric bwp; //bwpId=0, same as NrInitialDlBwpSib1 for TDD
NrPrachConfig prach;
NrMsg3PuschConfig msg3Pusch;
NrPucchConfig pucch;
};
Msg3 is scheduled by RAR UL grant (rv=0), and its retransmission is scheduled by DCI 0_0 with TC-RNTI.
Assume there is no Msg3 retransmission.
(10) Dedicated active UL BWP
struct NrActUlBwp
{
NrBwpGeneric bwp; //bwpId=1, same as NrActDlBwp for TDD
NrPucchConfig pucch;
NrType0PuschConfig type0Pusch;
NrType1PuschConfig type1Pusch;
NrSrsConfig srs;
};
struct NrPucchConfig
{
//TODO
};
struct NrType0PuschConfig
{
NrDci01RaType0 dci01Type0; //rnti=C-RNTI
int rbgConfig; //rbg-Size, can be {config1, config2}
int rbgSize; //the nominal size of RBG P
int aggFactor; //can be {1,2,4,8}, limited to a single layer transmission
NrPuschDmrsConfig dmrs;
};
struct NrType1PuschConfig
{
NrDci00 dci00; //rnti=TC-RNTI, msg3 PUSCH retransmission
NrDci01RaType1 dci01Type1; //rnti=C-RNTI
int freqOffset; //frequency offset of 2nd hop in case of intra-slot FH
NrPuschTransformPercoding tp;
int aggFactor; //can be {1,2,4,8}, limited to a single layer transmission
NrPuschDmrsConfig dmrs;
};
For simplicity, aggFactor is fixed to 1, aka, multi-slots PUSCH is not supported.
struct NrMsg3PuschConfig
{
NrRarUlGrant rarGrant;
int freqOffset; //frequency offset of 2nd hop in case of intra-slot FH
NrPuschTransformPercoding tp;
int aggFactor; // equal to 1 for Msg3
NrPuschDmrsConfig dmrs;
};
struct NrSrsConfig
{
//TODO
};