版权声明：本文为博主原创文章，未经博主允许不得转载。 https://blog.csdn.net/jj12345jj198999/article/details/82707202
1、背景介绍
板上zynq通过spi-1连接一片SPI FLASH，型号为n25q128a11。示意图如下：
由于之前都是通过EMC挂载NOR FLASH，这是第一次使用SPI FLASH挂载文件系统。Xilinx Wiki上有对SPI FLASH挂载文件系统的说明：插入网址。
虽然有介绍，但自己实际操作过程中还是遇到了一些问题，最主要的是spi flash芯片的ID读到的值均为f，与standalone跑出来的芯片真实ID值不一致。Standalone中芯片ID值如下：
上图中0x20BB18即芯片的ID。
自己运行过程中得到的值：
2、内核设置
由于使用SPI FLASH，需要在内核中加载SPI-NOR驱动，同时增加M25P80驱动，如图：
这里简单说明一下，spi-nor驱动中调用的是spi-nor.c，spi-nor中负责从flash列表中匹配当前连接的spi flash，匹配过程中会调用m25p80.c中的函数读取spi flash的device ID，而m25p80.c又会调用spi驱动依据spi协议格式去读取device ID。如下图，其中涉及到mtd和spi两方面的驱动。
内核按照上面的要求增加驱动后，编译即可。
3、devicetree设置
上面提到读出来的id均为f，一开始怀疑是内核问题，后来发现是devicetree配置导致的，devicetree中配置时需要注意下面几个地方
Num-cs：虽然我这里spi控制器只连了一片spi flash，但不代表num-cs=<0x1>，系统会自动去每个片选引脚去找东西，之前我这里就是配错了。
Spi-max-frequency：SPI总线频率值建议参考standalone中的设置，如下图
Tx-bus-width和rx-bus-width：根据硬件提供的信息，这里都设置为1就行了，这个和zynq的qspi设置不一样。
完整的devicetree信息如下
/dts-v1/;
/ {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "xlnx,zynq-7000";
cpus {
#address-cells = <0x1>;
#size-cells = <0x0>;
cpu@0 {
compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <0x0>;
clocks = <0x1 0x3>;
clock-latency = <0x3e8>;
cpu0-supply = <0x2>;
operating-points = <0xa4cb8 0xf4240 0x5265c 0xf4240>;
};
cpu@1 {
compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <0x1>;
clocks = <0x1 0x3>;
};
};
fpga-full {
compatible = "fpga-region";
fpga-mgr = <0x3>;
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
};
pmu@f8891000 {
compatible = "arm,cortex-a9-pmu";
interrupts = <0x0 0x5 0x4 0x0 0x6 0x4>;
interrupt-parent = <0x4>;
reg = <0xf8891000 0x1000 0xf8893000 0x1000>;
};
fixedregulator {
compatible = "regulator-fixed";
regulator-name = "VCCPINT";
regulator-min-microvolt = <0xf4240>;
regulator-max-microvolt = <0xf4240>;
regulator-boot-on;
regulator-always-on;
linux,phandle = <0x2>;
phandle = <0x2>;
};
amba {
u-boot,dm-pre-reloc;
compatible = "simple-bus";
#address-cells = <0x1>;
#size-cells = <0x1>;
interrupt-parent = <0x4>;
ranges;
adc@f8007100 {
compatible = "xlnx,zynq-xadc-1.00.a";
reg = <0xf8007100 0x20>;
interrupts = <0x0 0x7 0x4>;
interrupt-parent = <0x4>;
clocks = <0x1 0xc>;
xlnx,channels {
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
};
channel@1 {
reg = <1>;
};
channel@2 {
reg = <2>;
};
channel@3 {
reg = <3>;
};
channel@4{
reg = <4>;
};
channel@5{
reg = <5>;
};
channel@6{
reg = <6>;
};
channel@7{
reg = <7>;
};
channel@8 {
reg = <8>;
};
channel@9 {
reg = <9>;
};
channel@a {
reg = <0xa>;
};
channel@b {
reg = <0xb>;
};
channel@c {
reg = <0xc>;
};
channel@d {
reg = <0xd>;
};
channel@e {
reg = <0xe>;
};
channel@f {
reg = <0xf>;
};
channel@10 {
reg = <0x10>;
};
};
};
gpio@e000a000 {
compatible = "xlnx,zynq-gpio-1.0";
#gpio-cells = <0x2>;
clocks = <0x1 0x2a>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <0x2>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x14 0x4>;
reg = <0xe000a000 0x1000>;
};
i2c@e0004000 {
compatible = "cdns,i2c-r1p10";
status = "okay";
clocks = <0x1 0x26>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x19 0x4>;
reg = <0xe0004000 0x1000>;
#address-cells = <0x1>;
#size-cells = <0x0>;
clock-frequency = <0x61a80>;
cps1848@2 {
compatible = "cps1848";
reg = <0x2>;
};
cps1848@4 {
compatible = "cps1848";
reg = <0x4>;
};
cps1848@8 {
compatible = "cps1848";
reg = <0x8>;
};
cps226@40 {
compatible = "cps226";
reg = <0x40>;
};
};
i2c@e0005000 {
compatible = "cdns,i2c-r1p10";
status = "okay";
clocks = <0x1 0x27>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x30 0x4>;
reg = <0xe0005000 0x1000>;
#address-cells = <0x1>;
#size-cells = <0x0>;
clock-frequency = <0x61a80>;
};
interrupt-controller@f8f01000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <0x3>;
interrupt-controller;
reg = <0xf8f01000 0x1000 0xf8f00100 0x100>;
num_cpus = <0x2>;
num_interrupts = <0x60>;
linux,phandle = <0x4>;
phandle = <0x4>;
};
cache-controller@f8f02000 {
compatible = "arm,pl310-cache";
reg = <0xf8f02000 0x1000>;
interrupts = <0x0 0x2 0x4>;
arm,data-latency = <0x3 0x2 0x2>;
arm,tag-latency = <0x2 0x2 0x2>;
cache-unified;
cache-level = <0x2>;
};
memory-controller@f8006000 {
compatible = "xlnx,zynq-ddrc-a05";
reg = <0xf8006000 0x1000>;
};
ocmc@f800c000 {
compatible = "xlnx,zynq-ocmc-1.0";
interrupt-parent = <0x4>;
interrupts = <0x0 0x3 0x4>;
reg = <0xf800c000 0x1000>;
};
serial@e0000000 {
compatible = "xlnx,xuartps", "cdns,uart-r1p8";
status = "okay";
clocks = <0x1 0x17 0x1 0x28>;
clock-names = "uart_clk", "pclk";
reg = <0xe0000000 0x1000>;
interrupts = <0x0 0x1b 0x4>;
device_type = "serial";
port-number = <0x0>;
};
spi@e0006000 {
compatible = "xlnx,zynq-spi-r1p6";
reg = <0xe0006000 0x1000>;
status = "okay";
interrupt-parent = <0x4>;
interrupts = <0x0 0x1a 0x4>;
clocks = <0x1 0x19 0x1 0x22>;
clock-names = "ref_clk", "pclk";
#address-cells = <0x1>;
#size-cells = <0x0>;
is-decoded-cs = <0x0>;
num-cs = <0x3>;
};
spi@e0007000 {
compatible = "xlnx,zynq-spi-r1p6";
reg = <0xe0007000 0x1000>;
status = "okay";
interrupt-parent = <0x4>;
interrupts = <0x0 0x31 0x4>;
clocks = <0x1 0x1a 0x1 0x23>;
clock-names = "ref_clk", "pclk";
#address-cells = <0x1>;
#size-cells = <0x0>;
is-decoded-cs = <0x0>;
num-cs = <0x3>;
flash@0 {
compatible = "micron,n25q128a11","jedec,spi-nor";
reg = <0x1>;
spi-max-frequency = <0x9EF21B0>;
spi-tx-bus-width = <0x1>;
spi-rx-bus-width = <0x1>;
#address-cells = <0x1>;
#size-cells = <0x1>;
partition@dbf {
label = "spi-flash";
reg = <0x0 0x1000000>;
};
};
};
spi@e000d000 {
clock-names = "ref_clk", "pclk";
clocks = <0x1 0xa 0x1 0x2b>;
compatible = "xlnx,zynq-qspi-1.0";
status = "okay";
interrupt-parent = <0x4>;
interrupts = <0x0 0x13 0x4>;
reg = <0xe000d000 0x1000>;
#address-cells = <0x1>;
#size-cells = <0x0>;
is-dual = <0x1>;
num-cs = <0x1>;
};
ethernet@e000b000 {
compatible = "xlnx,ps7-ethernet-1.00.a";
reg = <0xe000b000 0x1000>;
status = "okay";
interrupt-parent = <0x3>;
interrupts = <0x0 0x16 0x4>;
clocks = <0x1 0xd 0x1 0x1e>;
clock-names = "ref_clk", "aper_clk";
#address-cells = <0x1>;
#size-cells = <0x0>;
enet-reset = <0x4 0x2f 0x0>;
local-mac-address = [00 0a 35 00 00 00];
phy-mode = "rgmii";
phy-handle = <0x5>;
xlnx,eth-mode = <0x1>;
xlnx,has-mdio = <0x1>;
xlnx,ptp-enet-clock = <0x69f6bcb>;
mdio {
#address-cells = <0x1>;
#size-cells = <0x0>;
phy@0 {
compatible = "marvell,88e1111";
device_type = "ethernet-phy";
reg = <0x4>;
linux,phandle = <0x7>;
phandle = <0x7>;
};
};
};
slcr@f8000000 {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd";
reg = <0xf8000000 0x1000>;
ranges;
linux,phandle = <0x5>;
phandle = <0x5>;
clkc@100 {
#clock-cells = <0x1>;
compatible = "xlnx,ps7-clkc";
fclk-enable = <0x1>;
clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci", "lqspi", "smc", "pcap", "gem0", "gem1", "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1", "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1", "dma", "usb0_aper", "usb1_aper", "gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper", "spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper", "uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper", "swdt", "dbg_trc", "dbg_apb";
reg = <0x100 0x100>;
ps-clk-frequency = <0x2faf080>;
linux,phandle = <0x1>;
phandle = <0x1>;
};
rstc@200 {
compatible = "xlnx,zynq-reset";
reg = <0x200 0x48>;
#reset-cells = <0x1>;
syscon = <0x5>;
};
pinctrl@700 {
compatible = "xlnx,pinctrl-zynq";
reg = <0x700 0x200>;
syscon = <0x5>;
};
};
dmac@f8003000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0xf8003000 0x1000>;
interrupt-parent = <0x4>;
interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3", "dma4", "dma5", "dma6", "dma7";
interrupts = <0x0 0xd 0x4 0x0 0xe 0x4 0x0 0xf 0x4 0x0 0x10 0x4 0x0 0x11 0x4 0x0 0x28 0x4 0x0 0x29 0x4 0x0 0x2a 0x4 0x0 0x2b 0x4>;
#dma-cells = <0x1>;
#dma-channels = <0x8>;
#dma-requests = <0x4>;
clocks = <0x1 0x1b>;
clock-names = "apb_pclk";
};
devcfg@f8007000 {
compatible = "xlnx,zynq-devcfg-1.0";
interrupt-parent = <0x4>;
interrupts = <0x0 0x8 0x4>;
reg = <0xf8007000 0x100>;
clocks = <0x1 0xc 0x1 0xf 0x1 0x10 0x1 0x11 0x1 0x12>;
clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3";
syscon = <0x5>;
linux,phandle = <0x3>;
phandle = <0x3>;
};
efuse@f800d000 {
compatible = "xlnx,zynq-efuse";
reg = <0xf800d000 0x20>;
};
timer@f8f00200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0xf8f00200 0x20>;
interrupts = <0x1 0xb 0x301>;
interrupt-parent = <0x4>;
clocks = <0x1 0x4>;
};
timer@f8001000 {
interrupt-parent = <0x4>;
interrupts = <0x0 0xa 0x4 0x0 0xb 0x4 0x0 0xc 0x4>;
compatible = "cdns,ttc";
clocks = <0x1 0x6>;
reg = <0xf8001000 0x1000>;
};
timer@f8002000 {
interrupt-parent = <0x4>;
interrupts = <0x0 0x25 0x4 0x0 0x26 0x4 0x0 0x27 0x4>;
compatible = "cdns,ttc";
clocks = <0x1 0x6>;
reg = <0xf8002000 0x1000>;
};
timer@f8f00600 {
interrupt-parent = <0x4>;
interrupts = <0x1 0xd 0x301>;
compatible = "arm,cortex-a9-twd-timer";
reg = <0xf8f00600 0x20>;
clocks = <0x1 0x4>;
};
watchdog@f8005000 {
clocks = <0x1 0x2d>;
compatible = "cdns,wdt-r1p2";
interrupt-parent = <0x4>;
interrupts = <0x0 0x9 0x1>;
reg = <0xf8005000 0x1000>;
timeout-sec = <0xa>;
};
};
chosen {
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
};
aliases {
ethernet0 = "/amba/ethernet@e000b000";
serial0 = "/amba/serial@e0000000";
spi0 = "/amba/spi@e000d000";
spi1 = "/amba/spi@e0006000";
spi2 = "/amba/spi@e0007000";
};
memory {
device_type = "memory";
reg = <0x0 0x40000000>;
};
};
3、测试验证
按照上述步骤正确配置后，启动linux即可看到文件系统挂载的打印信息
然后可以使用jffs2文件系统进行试验。
注：由于之前写过一篇文章linux 2017.4版本在NOR FLASH上挂载jffs2文件系统时有问题，这里本想用ubifs文件系统的，结果发现一直mount不上，反而jffs2文件系统一切正常，真是奇怪，看来不同类型的flash区别很大。
上图中挂载ubifs失败后尝试jffs2文件系统，这里参考wiki在文件系统中放了sample.bin
断电重启后，再次挂载文件系统，sample.bin还在，验证通过。
4、总结
之前调试过ZYNQ通过EMC连接NOR FLASH，如今需求变成了ZYNQ通过SPI连接SPI FLASH，不同的板子各不相同，看来搞定一种就认为能通吃的想法是完全不现实的，不断的学习才能解决工作中遇到的新问题。最后要感谢一下avnet的蔡总和卢工，他们给了我不少帮助。