386手册：
SGDT/SIDT copies the contents of the descriptor table register to the six bytes of memory indicated by the operand. The LIMIT field of the register is assigned to the first word at the effective address. If the operand-size attribute is 32 bits, the next three bytes are assigned the BASE field of the register, and the fourth byte is written with zero. The last byte is undefined. Otherwise, if the operand-size attribute is 16 bits, the next four bytes are assigned the 32-bit BASE field of the register.
奔腾手册：
Stores the contents of the global descriptor table register (GDTR) or the interrupt descriptor
table register (IDTR) in the destination operand. The destination operand specifies a 6-byte
memory location. If the operand-size attribute is 32 bits, the 16-bit limit field of the register is
stored in the lower 2 bytes of the memory location and the 32-bit base address is stored in the
upper 4 bytes. If the operand-size attribute is 16 bits, the limit is stored in the lower 2 bytes and
the 24-bit base address is stored in the third, fourth, and fifth byte, with the sixth byte filled with
0s.
最新的手册：
Stores the content of the global descriptor table register (GDTR) in the destination operand. The destination operand specifies a memory location.
In legacy or compatibility mode, the destination operand is a 6-byte memory location. If the operand-size attribute is 16 or 32 bits, the 16-bit limit field of the register is stored in the low 2 bytes of the memory location and the 32-bit base address is stored in the high 4 bytes.
In 64-bit mode, the operand size is fixed at 8+2 bytes. The instruction stores an 8-byte base and a 2-byte limit.
SGDT is useful only by operating-system software. However, it can be used in application programs without causing an exception to be generated if CR4.UMIP = 0. See “LGDT/LIDT—Load Global/Interrupt Descriptor Table Register” in Chapter 3, Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 2A, for information on loading the GDTR and IDTR.