push: Push the value of one or more registers onto the stack and update the stack pointer register. Syntax example: push {r1, r2, r3}.
add: performs addition and stores the result in the destination operand. Syntax example: add r1, r2, #5, add 5 to the value of register r2, and store the result in register r1.
push.w: Push the value of the specified register onto the stack, and adjust the stack pointer down by 4 bytes. Syntax example: push.w {r4, r5, lr}.
sub: Performs a subtraction and stores the result in the destination operand. Syntax example: sub r1, r2, #5, subtract 5 from the value of register r2, and store the result in register r1.
mov: Moves the value of the source operand to the destination operand. Syntax example: mov r1, r2, move the value of register r2 to register r1.
ldr: Load the data at the specified address in memory into the destination operand. Syntax example: ldr r1, [r2], load the data in the memory whose address is r2 into register r1.
str: Store the value of the source operand to the specified address in memory. Syntax example: str r1, [r2], store the value of register r1 into the memory whose address is r2.
movs: Move the value of the source operand to the destination operand and set the condition flag bit. Syntax example: movs r1, #1, move the value 1 into register r1, and set the condition flag.
adr: Load the offset of the specified address into the destination operand. Syntax example: adr r1, label, load the offset of label label into register r1.
ldr.w: Load the data at the specified address in memory into the target operand, and zero-extend it to 32 bits. Syntax example: ldr.w r1, [r2], load the data in the memory whose address is r2 into register r1, and zero-extend it to 32 bits.
adds.w: This is an ARM instruction that adds two operands and stores the result in the first operand. ".w" means to use 16-bit operand size. For example: adds.w r1, r2, #3 means to add 3 to the value in register r2, and then store the result in register r1.
bx: This is an ARM instruction that changes the control flow to another code address. It is usually used to implement a jump or return to a subroutine. For example: bx lr means jump from the current location to the address saved in the link register (LR) for execution.
cmp: This is an ARM instruction that compares the values of two operands and sets the condition code register according to the comparison result. For example: cmp r2, #0 means to compare the value of register r2 with zero.
bgt: This is an ARM instruction that changes the control flow to another code address when the result of the latest comparison is greater than. For example: bgt loop indicates that when the condition code register indicates that the result of the latest comparison is greater than, jump to the address where the label loop is located for execution.
cmp.w: This is an ARM instruction, similar to cmp, but ".w" means to use 16-bit operand size. For example: cmp.w r2, #255 means to compare the value of register r2 with 255.
it: This is an ARM instruction that means conditional code fusion. It allows multiple conditional operations to be performed in the same instruction. For example: it gt means that subsequent instructions will only be executed when the condition code register indicates that the result of the latest comparison is greater than.
mov.w: This is an ARM instruction that copies the value of one operand into another. ".w" means to use 16-bit operand size. For example: mov.w r0, #10 means to assign the constant value 10 to register r0.
lsl.w: This is an ARM instruction that shifts an operand to the left by a specified number of bits. ".w" means to use 16-bit operand size. For example: lsl.w r1, r2, #3 means to move the value of register r2 to the left by 3 bits, and then store the result in register r1.
b: This is an ARM instruction that changes the control flow to another code address. It is usually used to implement a jump or return to a subroutine. For example: b done means jump to the address where the label done is executed.
bne: This is an ARM instruction that changes the control flow to another code address when the result of the most recent comparison is not equal. For example: bne error means that when the condition code register indicates that the result of the latest comparison is not equal, jump to the address where the label error is located for execution.
beq.w: This is an ARM instruction that changes control flow to another code address when the condition code register indicates that the result of the most recent comparison is equal. ".w" means to use 16-bit operand size. For example: beq.w done means that when the condition code register shows that the result of the latest comparison is equal, jump to the address where the label done is executed.
bl: This is an ARM instruction that pushes the address in the current program counter (PC) into the link register (LR), and then changes the control flow to another code address. This is often used to implement function calls. For example: bl printf means calling the C library function printf().
beq: This is an ARM instruction, similar to beq.w, but does not specify the operand size. For example: beq error indicates that when the condition code register indicates that the result of the latest comparison is equal, jump to the address where the label error is located for execution.
cbz: This is an ARM instruction that says to test whether the value of a register is zero, and if it is zero, change the control flow to another code address. For example: cbz r1, done means that if the value of register r1 is zero, jump to the address where the label done is executed.
movt: This is an ARM instruction that moves a 16-bit immediate value to the upper 16 bits of the register. For example: movt r1, #0x1234 means to move the immediate value 0x1234 to the upper 16 bits of register r1.
blx: This is an ARM instruction, similar to bl, but can be used to jump to functions in Thumb or ARM code. For example: blx func means to call the function named func, which can be implemented by Thumb or ARM code.
cbnz: This is an ARM instruction, similar to cbz, but inverts the result when tested. For example: cbnz r3, loop means that if the value of register r3 is not zero, jump to the address where the label loop is located for execution.
subs: This is an ARM instruction that subtracts two operands and stores the result in the first operand. It also sets the condition code register to indicate whether the result is less than, equal to, or greater than zero. For example: subs r1, r2, #1 means subtract 1 from the value in register r2, store the result in register r1, and set the condition code register to indicate whether the result is less than, equal to, or greater than zero.
ittt: This is an ARM instruction that means conditional parallel execution (if-then). It allows multiple operations to be performed based on conditions in the same instruction. For example: ittt eq means that the subsequent instruction will only be executed if the condition code register indicates that the result of the latest comparison is equal.
pop: This is an ARM instruction that pops the value of one or more registers from the stack. For example: pop {r0, r1, r2} means that the value at the top of the stack is popped into registers r2, r1, and r0 in turn.
ldrb: This is an ARM instruction that reads a byte of data from memory and stores it in a register. For example: ldrb r1, [r2, #3] means to read one byte of data from the memory address with register r2 as the base address and offset of 3, and store the data in register r1.
strd: This is an ARM instruction that stores the values of two registers into memory. It can store 64 bits of data at a time. For example: strd r1, r2, [r0] means to store the values of register r1 and r2 together in the memory location with register r0 as the base address.
strb: This is an ARM instruction that stores one byte of data in memory. For example: strb r1, [r2, #3] means to store the value in register r1 to the memory address with register r2 as the base address and offset of 3.
pop.w: This is an ARM instruction, similar to pop, but ".w" means to use a 16-bit operand size. For example: pop.w {r0, r1, r2} means that three 16-bit values are popped from the top of the stack and stored in registers r2, r1, and r0 respectively.
str.w: This is an ARM instruction, similar to str, but ".w" means to use 16-bit operand size. For example: str.w r3, [r4, #8] means to store the value in register r3 into the memory location with register r4 as the base address and offset of 8.
bne.w: This is an ARM instruction, similar to bne, but ".w" means to use 16-bit operand size. For example: bne.w loop indicates that when the condition code register indicates that the result of the latest comparison is not equal, jump to the address where the label loop is located for execution.
eor: This is an ARM instruction that performs an exclusive OR operation on two operands and stores the result in the first operand. For example: eor r1, r2, #0xff means XOR the value in register r2 and 0xff, and then store the result in register r1.
mla: This is an ARM instruction that multiplies and adds three operands and stores the result in the first operand. For example: mla r1, r2, r3, r4 means to calculate the result of r2*r3+r4 and store the result in register r1.
lsls: This is an ARM instruction that shifts an operand to the left by a specified number of bits. It also sets the condition code register to indicate whether the result is less than, equal to, or greater than zero. For example: lsls r1, r2, #3 means to shift the value of register r2 to the left by 3 bits, store the result in register r1, and set the condition code register to indicate whether the result is less than, equal to, or greater than zero.
adds: This is an ARM instruction that adds two operands and stores the result in the first operand. It also sets the condition code register to indicate whether the result is less than, equal to, or greater than zero. For example: adds r1, r2, #3 means to add 3 to the value in register r2, store the result in register r1, and set the condition code register to indicate whether the result is less than, equal to or greater than zero.
movs.w: This is an ARM instruction, similar to mov, but it sets the condition code register to indicate whether the result is less than, equal to, or greater than zero. ".w" means to use 16-bit operand size. For example: movs.w r1, #10 means transfer the constant value 10 into register r1 and set the condition code register to indicate whether the result is less than, equal to or greater than zero.
itttt: This is an ARM instruction, similar to ittt, but can perform four conditional branches in the same instruction. For example: itttt gt indicates that subsequent instructions will only be executed when the condition code register indicates that the result of the latest comparison is greater than.
bhi: This is an ARM instruction, which means that in unsigned number comparison, if the result of the latest comparison is greater than when, the control flow is changed to another code address. For example: bhi loop indicates that when the unsigned number comparison result is greater than, jump to the address where the label loop is located for execution.
add.w: This is an ARM instruction, similar to add, but ".w" means to use a 16-bit operand size. For example: add.w r1, r2, #3 means to add 3 to the value in register r2, and then store the result in register r1.
subs.w: This is an ARM instruction, similar to subs, but ".w" means to use 16-bit operand size. For example: subs.w r1, r2, #1 means subtract 1 from the value in register r2, store the result in register r1, and set the condition code register to indicate whether the result is less than, equal to, or greater than zero.
bw: This is an ARM instruction, similar to b, but the instruction requires an operand size of 16 bits. For example: bw loop means jump to the address where the label loop is located for execution.
blt: This is an ARM instruction that means that in a signed number comparison, if the result of the latest comparison is less than when, the control flow is changed to another code address. For example: blt error means that when the signed number comparison result is less than, jump to the address where the label error is located for execution.
stm.w: This is an ARM instruction, similar to stm, but ".w" means to use 16-bit operand size. For example: stm.w r0!, {r1, r2, r3} means to store the values of registers r1, r2, and r3 in the memory location with register r0 as the base address, and increase the value of register r0 by 3.
itt: This is an ARM instruction, similar to ittt, but can only take two conditional branches in the same instruction. For example: itt lt indicates that subsequent instructions will only be executed if the condition code register indicates that the result of the latest comparison is less than.
addw: This is an ARM instruction, similar to add, but it allows addition of two operands at the same time, and the result is stored in the first operand. For example: addw r1, r2, r3 means to add the values of registers r2 and r3, and then store the result in register r1.
eors.w: This is an ARM instruction, similar to eor, but ".w" means to use 16-bit operand size. It XORs two operands and stores the result into the first operand. For example: eors.w r1, r2, #0xff means XOR the value in register r2 and 0xff, and then store the result in register r1.
lsls.w: This is an ARM instruction, similar to lsls, but ".w" means to use 16-bit operand size. It shifts one operand left by the specified number of bits and stores the result in the other operand. For example: lsls.w r1, r2, #3 means to move the value of register r2 to the left by 3 bits and store the result in register r1.
eors: This is an ARM instruction, similar to eors.w, but does not specify the operand size. It XORs two operands and stores the result into the first operand. For example: eors r1, r2, #0xff means XOR the value in register r2 and 0xff, and then store the result in register r1.
ldrd: This is an ARM instruction, similar to ldr, but it can read 64-bit data at a time. For example: ldrd r1, r2, [r3] means to load the 64-bit data at the memory location with register r3 as the base address into registers r1 and r2.
ble: This is an ARM instruction that means that in a signed number comparison, if the result of the latest comparison is less than or equal to, the control flow is changed to another code address. For example: ble loop indicates that when the signed number comparison result is less than or equal to, jump to the address where the label loop is located for execution.
movw: This is an ARM instruction, similar to mov, but can move a 16-bit immediate value into a register. For example: movw r1, #0x1234 means to move the immediate value 0x1234 to register r1.
mul: This is an ARM instruction that multiplies two operands and stores the result in the first operand. For example: mul r1, r2, r3 means to calculate the result of r2*r3 and store the result in register r1.
asrs: This is an ARM instruction, similar to asr, but it sets the condition code register to indicate whether the result is less than, equal to, or greater than zero. It shifts an operand to the right by the specified number of bits, filling the vacant bits on the left with sign bits. For example: asrs r1, r2, #3 means to move the value of register r2 to the right by 3 bits, fill the vacant bit on the left with the sign bit, store the result in register r1, and set the condition code register to indicate whether the result is Less than, equal to, or greater than zero.
ands: This is an ARM instruction, similar to and, but performs a bitwise AND operation on the two operands and stores the result in the first operand. For example: ands r1, r2, #0xff means that the value in register r2 and 0xff are bitwise ANDed, and then the result is stored in register r1.
and.w: This is an ARM instruction, similar to and, but ".w" means to use a 16-bit operand size. For example: and.w r1, r2, #0xff means to add the value in register r2 to 0
blt.w: Unconditionally jump to the target address if the result of the last comparison is less than zero. For example: blt.w 0x8000
rsb: Subtract the second operand from the first operand and store the result in the destination register. Example: rsb r0, r1, #2
orr.w: Performs a bitwise OR operation on the two operands and stores the result in the destination register. For example: orr.w r0, r1, #0xFF
bls: If the last comparison result is less than or equal to zero, unconditionally jump to the target address. Example: bls 0x9000
smmul: Perform a signed 16-bit multiplication, storing the result in the destination register. Example: smmul r0, r1, r2
mls: Performs a signed 32-bit multiply and subtracts the third operand, storing the result in the destination register. Example: mls r0, r1, r2, r3
asr.w: Perform arithmetic right shift on the first operand by the amount specified by the second operand, and store the result in the destination register. For example: asr.w r0, r1, #4
bge: If the last comparison result is greater than or equal to zero, unconditionally jump to the target address. For example: bge 0xA000
bhs: If the last comparison result is greater than or equal to zero, unconditionally jump to the target address. For example: bhs 0xB000
orr: Perform a bitwise logical OR operation on the two operands and store the result in the destination register. For example: orr r0, r1, #0xFF
eor.w: Performs a bitwise exclusive-or operation between the operands and stores the result in the destination register. ".w" means use 16-bit operand size. For example: eor.w r0, r1, #0x12, perform bitwise XOR operation on r1 and 0x12, and store the result in r0.
orrs: Performs a bitwise logical OR operation between two operands and sets a condition code based on the result. Condition codes are used for conditional judgment of subsequent branch instructions. For example: orrs r0, r1, #0x3F, perform a bitwise OR operation on r1 and 0x3F, and set the condition code according to the result.
and: Performs a bitwise AND operation between the two operands and stores the result in the destination register. For example: and r0, r1, #0xFF, perform a bitwise AND operation on r1 and 0xFF, and store the result in r0.
bic: Performs the bitwise complement operation of the first operand with the second operand and stores the result in the destination register. For example: bic r0, r1, #0x8, perform bitwise complement operation on r1 and 0x8, invert the result and store it in r0.
sub.w: Subtracts the second operand from the first operand and stores the result in the destination register. ".w" means use 16-bit operand size. For example: sub.w r0, r1, #0x2, subtract 0x2 from r1, and store the result in r0.
blo: If the last comparison result is less than zero (indicating that the target address is before the current instruction), jump to the target address for execution. For example: blo label, if the last comparison result is less than zero, jump to the label to execute.
ldrb.w: Reads a single byte (8 bits) of data from memory and stores it in the destination register. ".w" means use 16-bit operand size. For example: ldrb.w r0, [r1, #4], read and store a single byte at address r1+4 in r0.
strb.w: Write a single byte (8 bits) of data in a register to memory. ".w" means use 16-bit operand size. For example: strb.w r0, [r1, #4], writes a single byte in r0 to the memory location at address r1+4.
uxtab: Used to add two unsigned numbers and store the result back in a register. The characteristic of this instruction is that it will add the value in one register to the value in another register, where the value of the second register is used as a bit offset to obtain an address, and then add the value in this address Add the two byte unsigned numbers of , and store the result back in the first register. This instruction is usually used to operate on 16-bit unsigned numbers such as pixel data. For example: uxtab r0, r1, r2, r0=r1+r2.
uxtb: Extend the lower 8 bits of an operand to 32 bits and store the result in the destination register. For example: uxtb r0, r1, copy the lower 8 bits of r1 to the lower 8 bits of r0, and expand it to 32 bits.
orn: Perform a bitwise OR operation and inverse operation, perform a bitwise operation on the bits in the second operand and the first operand, if the result is 0, set the destination register to 1, otherwise 0. For example: orn r0, r1, #0x3F, perform a bitwise OR operation on r1 and 0x3F, invert the result, and store it in r0.
umull: Performs an unsigned 32-bit multiplication and stores the result in two destination registers. For example: umull r0, r1, r2, r3, multiply r2 and r3 as unsigned numbers, and store the result in r1:r0.
lsrs: Shifts the first operand to the right by the specified number of bits, fills the vacant bits on the left with zeros, and stores the result in the other operand. For example: lsrs r0, r1, #4, shift the value of r1 four bits to the right, fill the vacant bits on the left with zeros, and store the result in r0.
ldm.w: Reads the values of a set of registers from memory and stores them in consecutive destination registers. ".w" means use 16-bit operand size. For example: ldm.w r0, {r1-r4}, read the value of the r0 register in the memory and store it in r1 to r4.
ite: conditional code block, select to execute one set of instructions or another set of instructions according to the condition code setting. For example: ite eq, if the previous comparison result is equal to zero, the following set of instructions will be executed; otherwise, these instructions will be skipped.
stm: Store the value of a set of registers in memory, and update the base address register by incrementing or decrementing. For example: stm r0!, {r1-r3}, stores the value in r1 to r3 to the memory location at address r0, and increments r0 to point to the next memory location.
rsbs.w: Subtracts the second operand from the first operand and stores the negative of the result in the destination register. ".w" means use 16-bit operand size. For example: rsbs.w r0, r1, #5, inverts the result of subtracting 5 from r1 and stores it in r0.
sbcs.w: Performs a bitwise logical addition between the first and second operands, taking into account the result of the previous comparison. ".w" means use 16-bit operand size. For example: sbcs.w r0, r1, #0x3F, sum r1 and 0x3F, and then consider the result of the last comparison.
ldrh: Read a halfword (16 bits) of data from memory and store it in the destination register. For example: ldrh r0, [r1, #4], read a halfword at address r1+4 and store it in r0.
ldrsh.w: Read signed halfword (16-bit) data from memory and expand it to 32 bits, and store the result in the destination register. ".w" means use 16-bit operand size. For example: ldrsh.w r0, [r1, #2], read the signed halfword at address r1+2, expand it to 32 bits and store it in r0.
uxth.w: Extend the lower 16 bits of an operand to 32 bits and store the result in the destination register. ".w" means use 16-bit operand size. For example: uxth.w r0, r1, copy the lower 16 bits of r1 to the lower 16 bits of r0, and expand it to 32 bits.
uxth: Extend the lower 16 bits of an operand to 32 bits and store the result in the destination register. For example: uxth r0, r1, copy the lower 16 bits of r1 to the lower 16 bits of r0, and expand it to 32 bits.
vpush: Push the value of a group of vector registers from high address to low address onto the stack. For example: vpush {d8-d15}, push the value of d8 to d15 into the stack from high address to low address.
vldr: Read the value of the vector register from memory and load it into the specified vector register. For example: vldr d0, [r1], load the value in the memory address pointed to by r1 into the vector register d0.
mvn: Performs a bitwise negation of an operand and stores the result in the destination register. For example: mvn r0, r1, after inverting all bits of r1, store the result in r0.
vmov: Copies the value in one vector register to another vector register. For example: vmov d0, d1, copy the value of d1 to d0.
muls: Performs a signed 16-bit multiplication and stores the result in the destination register. For example: muls r0, r1, r2, multiply r1 and r2 as signed numbers and store the result in r0.
vstr: Store the value of the vector register into memory. For example: vstr d0, [r1], store the value in the vector register d0 to the memory address pointed to by r1.
vpop: Pops the values of a set of vector registers from the stack and loads them into the corresponding vector registers. For example: vpop {d8-d15}, pop the values d8 to d15 from the stack and load them into the corresponding vector registers.
tbb: Use the index value in an operand to get a byte in the lookup table and jump to the address corresponding to the byte. For example: tbb [r0, r1], add r0 and r1 as an index, find the corresponding byte in the address, and jump to the address corresponding to the byte.
strh: Write a halfword (16 bits) of data into memory. For example: strh r0, [r1, #4], write the value of r0 as a halfword to the memory location whose address is r1+4.
vmrs: Load the value in the status register into the general purpose register. For example: vmrs r0, fpscr, load the value in the floating-point status register fpscr into the general-purpose register r0.
tst.w: Performs a bitwise AND operation between two operands and sets a condition code based on the result. Condition codes are used for conditional judgment of subsequent branch instructions. ".w" means use 16-bit operand size. For example: tst.w r0, #0x3F, perform bitwise AND operation on r0 and 0x3F, and set the condition code according to the result.
bmi: If the previous comparison result is negative, jump to the target address for execution. For example: bmi label, if the previous comparison result is negative, jump to the label to execute.
lsr.w: Shifts the first operand to the right by the specified number of bits and stores the result in the other operand. ".w" means use 16-bit operand size. For example: lsr.w r0, r1, #2, move the value of r1 to the right by two bits and store the result in r0.
sbfx: Take a segment of bits in an operand and store it in the destination register. For example: sbfx r0, r1, #4, #6, select the part between bit 4 and bit 9 from r1 and store it in r0.
ubfx: Takes a segment of bits in an operand and unsign-extends it to 32 bits, and stores the result in the destination register. For example: ubfx r0, r1, #4, #6, select the part between bit 4 and bit 9 from r1, expand it to 32 bits and store it in r0.
subw: Subtracts the second operand from the first operand and stores the result in the destination register. ".w" means use 16-bit operand size. For example: subw r0, r1, #2, subtract 0x2 from r1, and store the result in r0.
rsb.w: Subtracts the first operand from the second operand and stores the negative of the result in the destination register. ".w" means use 16-bit operand size. For example: rsb.w r0, r1, #5, invert the result of subtracting 5 from r1 and store it in r0.
sbc: Perform the first operand minus the second operand and then subtract the carry value (carry) in the last comparison result, and store the result in the target register. For example: sbc r0, r1, r2, subtract r1 and r2, then subtract the carry value in the last comparison result, and store the result in r0.
dmb: Ensure barrier synchronization before and after all memory accesses. For example: dmb, ensure that all memory accesses before and after this instruction have completed.
ldrex: Loads a single data element and sets a lock bit to prevent other cores from modifying the data element. For example: ldrex r0, [r1], loads a single data element from memory address r1, and sets a lock bit when reading to prevent other cores from modifying the data element.
strex: Writes a single data element to a memory address and clears the flag to indicate that the data element is no longer locked. For example: strex r0, r1, [r2], write the value of r1 to memory address r2, and clear the lock flag, indicating that the data element is no longer locked.
blo.w: If the previous comparison result is negative or zero, jump to the target address for execution. ".w" means use 16-bit operand size. For example: blo.w label, if the previous comparison result is negative or zero, jump to the label to execute.
bhi.w: If the previous comparison result is unsigned higher than, jump to the target address for execution. ".w" means use 16-bit operand size. For example: bhi.w label, if the previous comparison result is unsigned higher than, then jump to label to execute.
tbh: Use the index value in an operand to get a halfword in the lookup table and jump to the address corresponding to the halfword. For example: tbh [r0, r1, lsl #1], shift r0 and r1 one bit to the left and add them as an index, look up the corresponding halfword in the lookup table and jump to its address.
bls.w: If the previous comparison result is negative, zero or unsigned less than, jump to the target address for execution. ".w" means use 16-bit operand size. For example: bls.w label, if the previous comparison result is negative, zero or unsigned less than, then jump to label for execution.
bics: Inverts the second operand bitwise and performs a bitwise AND operation with the first operand, storing the result in the destination register. For example: bics r0, r1, #0x3F, after bitwise inversion of 0x3F, perform bitwise AND operation with r1, and store the result in r0.
sxth: Extend the lower 16 bits of an operand to signed 32 bits and store the result in the destination register. For example: sxth r0, r1, copy the lower 16 bits of r1 to the lower 16 bits of r0, and extend it to signed 32 bits.
bge.w: If the previous comparison result is greater than or equal to zero, jump to the target address for execution. ".w" means use 16-bit operand size. For example: bge.w label, if the previous comparison result is greater than or equal to zero, jump to the label to execute.
bgt.w: If the previous comparison result is greater than zero, jump to the target address for execution. ".w" means use 16-bit operand size. For example: bgt.w label, if the previous comparison result is greater than zero, jump to the label to execute.
ror.w: Rotates the first operand to the right by the specified number of bits and stores the result in the other operand. ".w" means use 16-bit operand size. For example: ror.w r0, r1, #4, rotate the value of r1 to the right by 4 bits, and store the result in r0.
adc.w: Perform the first operand plus the second operand plus the carry value (carry) in the last comparison result, and store the result in the destination register. ".w" means use 16-bit operand size. For example: adc.w r0, r1, r2, add r1 and r2, plus the carry value in the last comparison result, and store the result in r0.
bhs.w: If the previous comparison result is unsigned greater than or equal to, jump to the target address for execution. ".w" means use 16-bit operand size. For example: bhs.w label, if the previous comparison result is unsigned greater than or equal to, then jump to label to execute.
pkhbt: Select a specified number of bytes from the two operands and store them alternately in the destination register. For example: pkhbt r0, r1, r2, select 4 bytes from r1 and r2, and store these bytes alternately in r0.
adcs: Perform the first operand plus the second operand plus the carry value (carry) in the last comparison result, and store both the result and the carry value in the target register. For example: adcs r0, r1, r2, add r1 and r2, plus the carry value in the last comparison result, the result and the new carry value are stored in r0.
sbcs: Perform the first operand minus the second operand and then subtract the carry value (carry) in the last comparison result, and store the result and the borrow value in the target register. For example: sbcs r0, r1, r2, subtract r1 and r2, then subtract the carry value in the last comparison result, the result and the new borrow value are stored in r0.
adc: Perform the first operand plus the second operand plus the carry value (carry) in the last comparison result, and store the result in the destination register. For example: adc r0, r1, r2, add r1 and r2, plus the carry value in the last comparison result, and store the result in r0.
ble.w: If the previous comparison result is less than or equal to zero, jump to the target address for execution. ".w" means use 16-bit operand size. For example: ble.w label, if the previous comparison result is less than or equal to zero, jump to the label to execute.
bfi: Insert a segment of bits from one operand into the specified position of another operand and store the result in the destination register. For example: bfi r0, r1, #4, #6, insert the part between bit 4 and bit 9 of r1 into the position between bit 4 and bit 9 of r0.
cmn.w: Executes the first operand plus the second operand, but does not change the value of any operand, and sets the condition code according to the result. ".w" means use 16-bit operand size. For example: cmn.w r0, r1, perform the addition of r0 and r1, but do not change their values, and set the condition code according to the result.
lsr: Shifts the first operand to the right by the specified number of bits and stores the result in the other operand. For example: lsr r0, r1, #2, move the value of r1 to the right by two bits and store the result in r0.
lsl: Shifts the first operand to the left by the specified number of bits and stores the result in the other operand. For example: lsl r0, r1, #4, shift the value of r1 to the left by 4 bits, and store the result in r0.
movge: Copies the value of the second operand into the destination register if the result of the previous comparison is greater than or equal to zero. For example: movge r0, r1, if the previous comparison result is greater than or equal to zero, copy the value of r1 to r0.
ldrh.w: Load a halfword (16 bits) from memory and store it in the destination register. ".w" means use 16-bit operand size. For example: ldrh.w r0, [r1, #4] loads a halfword from the memory location at address r1+4 and stores it in r0.
bic.w: Perform bitwise inversion of the first operand, and perform bitwise AND operation with the second operand, and store the result in the destination register. ".w" means use 16-bit operand size. For example: bic.w r0, r1, #0x3F, after inverting 0x3F bitwise, perform bitwise AND operation with r1, and store the result in r0.
sbc.w: Execute the first operand minus the second operand and then subtract the carry value (carry) in the last comparison result, and store the result in the target register. ".w" means use 16-bit operand size. For example: sbc.w r0, r1, r2, subtract r1 and r2, then subtract the carry value in the last comparison result, and store the result in r0.
orrs.w: Performs a bitwise OR operation on two operands and sets a condition code based on the result. ".w" means use 16-bit operand size. For example: orrs.w r0, r1, r2, perform a bitwise OR operation on r1 and r2, and set the condition code according to the result.
rsbs: Sets the first operand to zero and subtracts the value of the second operand, storing the result in the destination register. For example: rsbs r0, r1, #10, subtract 10 from the value of r1 and store the result in r0.
tst: Performs a bitwise AND operation on two operands and sets a condition code based on the result. For example: tst r0, r1, perform a bitwise AND operation on r0 and r1, and set the condition code according to the result.
ldm: Load multiple register values from the stack or memory. For example: ldm r13!, {r0, r1, r2}, load the values of r0, r1 and r2 from the stack, and increase the stack pointer by 12 bytes (3*4).
sxtb: Sign-extends the lower 8 bits of an operand to signed 32 bits and stores the result in the destination register. For example: sxtb r0, r1, copy the lower 8 bits of r1 to the lower 8 bits of r0, and extend it to signed 32 bits.
rev: Reverse the byte order of an operand and store the result in the destination register. For example: rev r0, r1, reverse the byte order in r1 and store the result in r0.
uxtb.w: Unsign-extend the lower 8 bits of an operand to 32 bits and store the result in the destination register. ".w" means use 16-bit operand size. For example: uxtb.w r0, r1, copy the lower 8 bits of r1 to the lower 8 bits of r0, and unsign extend it to 32 bits.
ldrsb: Loads a byte from memory, sign-extends it to 32-bit signed integer form, and stores the result in the destination register. For example: ldrsb r0, [r1], load a byte from the memory location at address r1, sign extend it to 32-bit signed integer form, and store the result in r0.
sxtb.w: This is a sign extension instruction that sign-extends the value in an eight-bit register to 32 bits and stores it in the target register.
Example: sxtb.w r0, r1
This example sign-extends the value in register r1 to 32 bits and stores the result in register r0.
ldrsb.w: This is a sign-extended byte load instruction, which reads a byte from the specified address, sign-extends it to 32 bits and stores it in the target register.
Example: ldrsb.w r0, [r1, #2]
This example reads a byte from the address pointed to by r1+2, sign-extends it to 32 bits, and stores the result in the r0 register.
itee: This is a conditional code block instruction, which is used to perform multiple operations, which operation is selected according to the condition. This directive can nest any number of operations.
example:
itee ne
add r0, r1, r2
sub r1, r2, r3
In this example, if the condition code is not equal, the add instruction will be executed; otherwise, the sub instruction will be executed.
bxeq: This is a branch and exchange instruction, which is used to change the current processor mode to the code segment of the branched subroutine, and returns a result register value.
Example: bxeq lr
This example will jump into a subroutine using the address in the link register lr and return the resulting register value.
moveq: This is a conditional move instruction that moves the value of the source register to the destination register if the condition code is equal.
Example: moveq r0, r1
This example moves the value in register r1 to register r0 when the condition code equals.
movne: This is a conditional move instruction that moves the value of the source register to the destination register if the condition code is not equal.
Example: movne r0, r1
This example moves the value in register r1 to register r0 when the condition code is not equal.
clz: This is an instruction to calculate the number of leading zeros, which can be used to calculate the number of leading zeros in the binary representation of a 32-bit integer.
Example: clz r0, r1
This example will count the number of leading zeros in the value in the r1 register and store the result in the r0 register.
bfc: This is a bit field clear instruction, which is used to clear bits within a specified range.
Example: bfc r0, #8, #16
This example will clear the bits from bit 8 to bit 23 in the r0 register.
subhs: This is a conditional subtract instruction that will subtract the value in a register with another operand and add the result according to the condition code.
Example: subhs r0, r1, #64
This example subtracts 64 from the value in the r1 register and adds the result to the condition code. Executed only if the current state is greater than or equal to.
orrhs: This is a bitwise OR operation that bitwise ORs the value in a register with another operand and stores the result in the destination register. Executed when the condition code is HS (greater than or equal to).
Example: orrhs r0, r1, #0xff
This example bitwise ORs the value in register r1 with 0xff and stores the result in register r0. Will only execute if the current state is greater than or equal to.
lsrsne: This is a logical right shift operation that shifts the value in a register to the right by the specified number of bits and stores the result in the destination register. Executed when the condition code is NE (not equal to).
Example: lsrsne r0, r1, #3
This example shifts the value in the r1 register to the right by 3 bits and stores the result in the r0 register. Only executed if the current state is not equal to.
lsrne: This is a logical right shift operation that shifts the value in a register to the right by the specified number of bits and stores the result in the destination register. Executed when the condition code is NE (not equal to).
Example: lsrne r0, r1, r2
This example shifts the value in register r1 to the right by the number of bits specified by the value in register r2 and stores the result in register r0. Only executed if the current state is not equal to.
strh.w: This is a halfword (16-bit) storage instruction, which stores the value in a register to the memory at the specified address, and uses halfword-sized data for storage. After execution, the storage address is automatically incremented by 2 bytes to point to the next location to be written.
Example: strh.w r1, [sp, #4]
This example writes the value in the r1 register to the memory location at address + 4 stored in the sp register in halfword size.
rev.w: This is a reverse byte order instruction, which reverses the value in a register byte by byte and stores it back in the destination register.
Example: rev.w r0, r1
This example reverses the value in register r1 byte-wise and stores the result in register r0.
asr: This is an arithmetic right shift instruction, which shifts the value in the register to the right by the specified number of bits and fills it according to the sign bit.
Example: asr r0, r1, #4
This example shifts the value in register r1 to the right by 4 bits, pads it according to the sign bit, and stores the result in register r0.
svc: This is an instruction to trigger a service call from the operating system. It will switch the current CPU mode to privileged mode, and execute a specific interrupt program to handle service requests.
Example: svc#0
This example will trigger the operating system interrupt service 0 to complete the corresponding operation.
cmn: This is a compare and add instruction that compares the value in a register with another operand and adds the result to the condition code.
Example: cmn r1, #0xff
This example compares the value in the r1 register with 0xff and adds the result to the condition code.
bxls: This is an unconditional branch instruction, which is used to jump from the current program location to another instruction address.
Example: bxls lr
This example will jump to the link pointed to by the link register lr
asrge: This is an arithmetic right shift instruction that shifts the value in a register to the right by the specified number of bits and fills it according to the sign bit. Executed when the condition code is GE (greater than or equal to).
Example: asrge r0, r1, #4
This example shifts the value in register r1 to the right by 4 bits, pads it according to the sign bit, and stores the result in register r0. It will only be executed if the current state is greater than or equal to.
ldrsh: This is a halfword load instruction with sign extension, which reads a halfword from the specified address, sign extends it to 32 bits and stores it in the target register.
Example: ldrsh r0, [r1, #2]
This example reads a halfword from the address pointed to by r1+2, sign-extends it to 32 bits, and stores the result in the r0 register.
sxtah: This is a sign-extended halfword merge instruction that merges two halfword values into a 32-bit signed integer and stores the result in the destination register.
Example: sxtah r0, r1, r2
This example combines the halfword values in the r1 and r2 registers into a 32-bit signed integer and stores the result in the r0 register.
itte: This is a conditional code block instruction, which is used to perform multiple operations, which operation is selected according to the condition. This directive can nest any number of operations.
example:
itte eq
add r0, r1, r2
sub r1, r2, r3
In this example, if the condition code is equal, the add instruction will be executed; otherwise, the sub instruction will be executed.
mvns: This is a bitwise inversion and shift instruction, which performs bitwise inversion of the value in the register and then shifts the specified number of digits to the left, and then stores the result in the target register.
Example: mvns r0, r1, lsl #8
This example inverts the value in the r1 register, shifts it left by 8 bits, and stores the result in the r0 register.
rsbmi: This is a conditional reverse subtraction instruction that subtracts the value in a register from another operand and adds the result according to the condition code. Executed when the condition code is MI (negative number).
Example: rsbmi r0, r1, #64
This example subtracts 64 from the value in the r1 register and adds the result to the condition code. Executed only if the current state is negative.
movlo: This is a conditional move instruction that moves the value of the source register into the destination register if the condition code is less than (unsigned less than).
Example: movlo r0, r1
This example moves the value in the r1 register to the r0 register when the condition code is below.
asreq: This is an arithmetic right shift instruction, which shifts the value in the register to the right by the specified number of bits and fills it according to the sign bit. Executed when the condition code is EQ (equal to).
Example: asreq r0, r1, #4
This example shifts the value in register r1 to the right by 4 bits, pads it according to the sign bit, and stores the result in register r0. Will only execute if the current state is equal to.
orreq: This is a bitwise OR logical operation instruction that performs a bitwise OR operation on the values in two registers and stores the result in the destination register. This instruction is only executed when the condition code is EQ (equal to).
Example:
orreq r0, r1, r2
This example performs a bitwise OR operation on the values in the r1 and r2 registers and stores the result in the r0 register. Will only execute if the current state is equal to. For example, if r1 = 0b11001100 and r2 = 0b10101010, then r0 will contain 0b11101110.
The IT (If-Then) statement in the ARM instruction is a conditional execution instruction, which contains one or more condition codes, indicating that one or more instructions below are executed according to the conditions. And GE means "greater than or equal to", which is activated when the flag bit N is 0 (the result is a positive number or zero) or Z is 1 (the result is 0).
In the IT GE statement, if the condition is met, the next instruction is executed, otherwise the next instruction is skipped. For example:
CMP R1, R2 ;比较R1和R2
IT GE ;如果R1大于等于R2，则执行下一个指令
ADDGE R3, R4, #1 ;如果条件成立，则将R4和立即数#1相加并存储到R3中
This code first uses the CMP instruction to compare the values of registers R1 and R2, and then uses the IT GE instruction to check whether the condition "R1 is greater than or equal to R2" is met. If it is true, the next instruction ADDGE is executed; otherwise, the instruction is skipped. The ADDGE instruction adds register R4 to immediate #1 and stores the result in register R3.
Therefore, the IT GE statement can help programmers optimize the code, reduce the use of branch instructions, and improve the execution efficiency of the program on the ARM processor.
The ITT (If-Then-Else) instruction in the ARM instruction set is a conditional execution instruction that allows programmers to selectively execute a group of instructions based on conditions. There are many forms of ITT instruction, among which "ITT Hi" instruction is one of them. What it does is to set up a conditionally executed block in the processor that contains the then branch in the if-then-else statement.
Specifically, the "ITT Hi" instruction determines whether to execute the next instruction block according to the state of the condition code (CPSR flag register) in the register. If the condition code satisfies the condition, the instructions in the block are executed, otherwise the block is skipped.
Here is a simple example showing how to use the ITT Hi command:
CMP r0, #0 ;比较r0寄存器中的值是否为0
ITT Hi ;如果条件码指示r0大于0，则执行下面的指令块
ADDGT r1, r2, #1 ;如果r0>0，则将r2的值加1，然后将结果存储到r1中
SUBLE r1, r2, #1 ;否则将r2的值减1，然后将结果存储到r1中In this example, the value of r0 is first compared to 0 using the CMP instruction. Then, a conditional execution block is set up using the ITT Hi instruction, which contains two instructions ADDGT and SUBLE. If r0>0, execute the ADDGT instruction, otherwise execute the SUBLE instruction. This example demonstrates how to use the ITT Hi instruction to execute different instruction blocks based on conditions.