A description of the design and timing of asynchronous design

Synchronous and asynchronous logic logical distinction
synchronization logic is a causal relationship between a fixed clock. Asynchronous logic between the clock is no causal relationship between the fixed
synchronous and asynchronous circuits distinction
synchronous clock source circuit has unity, through PLL frequency-divided clock driver modules, because a single clock source is driven, or synchronous circuit .
Asynchronous clock source circuit is not uniform

Asynchronous circuit design of the circuit is simple, low cost hardware;

Synchronous circuit design circuit consume more hardware resources, greatly improving performance while its easy static timing analysis. Using essentially synchronous LSI design methods;

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Origin www.cnblogs.com/Z-selfadd/p/11289563.html