Because speech is not standard C acquired pointer SP. Thus, if you want to register to obtain the value of the stack by the C code, it is necessary with a short assembly code to obtain the current value of the SP, the SP value and then transmitted as a parameter to the C code, and finally to form the stack pointer the output value of each register, but also some of the various status registers may output desired value. as follows:
Keil compilation environment cover:
1 HardFault_Handler\ 2 PROC 3 EXPORT HardFault_Handler [WEAK] 4 IMPORT hard_fault_handler_c 5 TST LR, #4 6 ITE EQ 7 MRSEQ R0, MSP 8 MRSNE R0, PSP 9 B hard_fault_handler_c 10 ENDP
C Service program, enter the value of the SP:
1 void hard_fault_handler_c( unsigned int *reg ) 2 { 3 unsigned int stacked_r0; 4 unsigned int stacked_r1; 5 unsigned int stacked_r2; 6 unsigned int stacked_r3; 7 unsigned int stacked_r12; 8 unsigned int stacked_lr; 9 unsigned int stacked_pc; 10 unsigned int stacked_psr; 11 12 stacked_r0 = (unsigned int)reg[0]; 13 stacked_r1 = (unsigned int)reg[1]; 14 stacked_r2 = (unsigned int)reg[2]; 15 stacked_r3 = (unsigned int)reg[3]; 16 17 stacked_r12 = (unsigned int)reg[4]; 18 stacked_lr = (unsigned int)reg[5]; 19 stacked_pc = (unsigned int)reg[6]; 20 stacked_psr = (unsigned int)reg[7]; 21 22 while( 1 ) 23 { 24 printf("--> %s\r\n", __FUNCTION__); 25 //printf("EXC_RETURN: %08X\r\n", r1); 26 printf("R0: %08X\r\n", stacked_r0); 27 printf("R1: %08X\r\n", stacked_r1); 28 printf("R2: %08X\r\n", stacked_r2); 29 the printf ( " R3:% 08X \ R & lt \ n- " , stacked_r3); 30 the printf ( " R12:% 08X \ R & lt \ n- " , stacked_r12); 31 is the printf ( " the LR:% 08X \ R & lt \ n- " , stacked_lr); 32 the printf ( " the PC:% 08X \ R & lt \ n- " , stacked_pc); 33 is the printf ( " the PSR:% 08X \ R & lt \ n- " , stacked_psr); 34 is 35 // the system handler control and status register 36 the printf ( " SHCSR: 08X% \ r \ the n- " ,(*(volatile unsigned int *) ( 0xE000ED24 ))); 37 [ // the printf ( "MFSR:% 02X \ R & lt \ n-", (* (volatile unsigned char *) (0xE000ED28))); 38 is // the printf ( "a BFSR:% 02X \ R & lt \ n-", (* (volatile unsigned char *) (0xE000ED29))); 39 // the printf (" UFSR:% 04X \ R & lt \ n-", (* (* volatile unsigned Short) (0xE000ED2A))); 40 // memory management fault, the bus fault, usage fault status register 41 is the printf ( " CFSR:% 08X \ R & lt \ n- " , (* ( volatile unsigned int *) ( 0xE000ED28 ))); 42 is // hard fault status register 43 is the printf ( 'HFSR is:% 08X \ R & lt \ n- " , (* ( volatile unsigned int *) ( 0xE000ED2C ))); 44 is // debug fault status register 45 the printf ( " the DFSR:% 08X \ R & lt \ n- " , (* ( volatile unsigned int *) ( 0xE000ED30 ))); 46 is 47 // memory management fault address register 48 the printf ( " The MMAR is:% 08X \ R & lt \ n- " , (* ( volatile unsigned int *) ( 0xE000ED34 ))); 49 // bus fault address register 50 the printf ( " BFAR:% 08X \ R & lt \ n- " , (* ( volatile unsigned int *) ( 0xE000ED38 ))); 51 is // secondary fault address register 52 is the printf ( " AFAR:% 08X \ R & lt \ n- " , (* ( volatile unsigned int *) ( 0xE000ED3C ))); 53 is } 54 is 55 return ; 56 is }
Quoting from the reference:
"ARM Cortex-M3 Definitive Guide .pdf"