The UART serial communication

1 Introduction

        The UART (Universal Asynchronous Receiver and Transmitter) i.e. a universal asynchronous receiver transmitter, is a common serial data bus , genus serial communication, asynchronous communication. The bus lines are sent and received, can achieve full-duplex bidirectional communication to transmit and receive. Implemented as a parallel-to-serial signal output from the channel chip, often integrated on connecting other communication interfaces. In FPAG development board, commonly UART to communicate with the PC, including data communications, command and control the transmission of information.

title

 Asynchronous Communication : UART protocol sender and the recipient does not use uniform reference clock, i.e., transmitting and receiving devices have their own clock to control data transmission and reception. The two sides in characters, the communication time between two characters is the number of intervals is not fixed, but at the same time between two adjacent bit of a character spacing is fixed. Both sides get synchronization method is to use a fixed serial data format

Serial communication : serial communication between the peripheral and computer means, a means of communication by the ground data, control lines, bit data transmission. In this manner less cable is used in long-distance transmission can save communication cost, but low transmission speed than the transmission of parallel.

     I.e., bit by bit serial transmission and reception of bytes. Serial transmissions are usually used for the ASCII characters, i.e. a communication line using three transmit, receive and ground to. Since the serial communication is asynchronous, serial port to receive data transmitted on one line the other lines. Other lines are used to shake hands, but not necessary .

Important parameters of serial communication : baud rate , data bits , stop bits , and parity bits . Two sides to communicate, these parameters must match the port.

Differs RS232 UART : UART TTL level (3.3V) interface, RS232 to RS232 level (5-12V) port. When the device requires a UART on the serial port on the PC connected to the PC side is the RS232 type), which has a drive to a RS232 level conversion (similar MAX232 chip).

Asynchronous communication data format

 

Communication protocol transmission timing 2.UART

    As a UART asynchronous serial communication protocol, it works by each character transmitted data bit by bit transmission. Therefore, when the UART communication, firstly the received parallel data into serial data for transmission. Message frame format and a timing chart is as follows:

     Message frame from the start bit, followed by 7 or 8 bits of data (the first low pass, high re-transmission), and is available in a parity bit and a stop bit or a few high. When the receiver detects the start bit to know the data ready to be sent, and the transmitting side attempts a clock frequency synchronization.

Start bit : first the transmitting end sends a logic "0" signal indicating the start transmission character.

Data bit (data bits) : keeping pace with the start bit. Data bits can be 4,5,6,7,8-bit, and a character. Typically in ASCII code, and the first low pass, by positioning the clock.

Parity: the data bits plus 1, so that the number of bits "1" should verify the correctness of data transfer is even (even parity) or odd (odd parity) in order to.

停止位:这是一个字符数据的结束标志。  可以是1位、1.5位、2位的高电平。 由于数据是在传输线上定时的,并且每一个设备有其自己的时钟,很可能在通信中两台设备间出现了小小的不同步。因此停止位不仅仅是表示传输的结束,并且提供计算机校正时钟同步的机会。适用于停止位的位数越多,不同时钟同步的容忍程度越大,但是数据传输率同时也越慢。

空闲位:处于逻辑“1”状态,表示当前线路上没有资料传送。

     接收过程中,UART会从接收到的消息帧中去掉起始位和结束位。如果有奇偶校验位,那么需要对拿到的数据进行奇偶校验,并且负责将数据字节进行串行转并行。

波特:是衡量数据传送速率的指标。表示每秒钟传送的的二进制位数。一个符号代表的信息量(比特数)与符号的阶数有关。例如传输使用256阶符号,每8bit代表一个符号,资料传送速率为120字符/秒,则波特率就是120baud,比特率是120*8=960bit/s。这两者的概念很容易搞错。

16倍频采样

        通常会采用常规的16倍频采样方法:即采用数据传输速率(波特率)的16倍进行采样,采样时钟连续采样到8个低电平信号,可确定

该低电平为真正的起始信号,从而防止干扰信号导致的虚假起始位现象。此后接收器每隔16个采样时钟采样一次,并把采样得到的数据作为输入数据,以移位方式存入到接收移位寄存器。

        起始位检测8个连续脉冲的另一个原因是,采用16倍频的采样时钟,第8个采样脉冲所对应的数据波形正好是该数据位的正中点(上升沿采样),在该处读写数据会最安全准确。

分频系数 = 系统时钟/16*p。

3. Verilog实现

 功能模块的划分:

 

 

 

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Origin blog.csdn.net/qq_26652069/article/details/90489628