Assembler: MSR / MRS / BIC instruction

. 1, MRS instruction
format instruction is MRS:
MRS {condition} a general register, a program status register (CPSR or the SPSR)
MRS instructions move the contents of the program status register to a general register. This instruction is generally used in the following two cases Hu: 

when Ⅰ when the need to change the contents of the program status register, the contents of the available MRS program status register of the general register is read, modified, and written back to the program status register.
Ⅱ. When the exception processing or handover process, need to be saved program status register, the program may be read first command status register using the value of the register and save.
Instruction Example:
the MRS R0, content CPSR @ transferred CPSR to R0
the MRS R0, content SPSR @ transferred SPSR to R0



2, MSR instruction
format MSR instruction is:
MSR {condition} program status register (CPSR or SPSR) _ <Domain > operand
MSR instruction with the contents of the right foot of the operand is transferred to the program status register in a particular domain. Wherein, the operation may be a general-purpose register number of registers or immediate. <Field> is used in the program status register bit set need to operate, the program status register 32 can be divided into four fields:
bits [31:24] of the condition flag field, represented by f;
bits [23:16] a status bit field, expressed by s;
bits [15: 8], as expressed by an extension bit field x;
bit [7: 0] of the control bit field, represented by c;

this instruction is typically used to restore or change the program status register content, when used, will generally be in the specified MSR instructions domain operations.
Instruction Example:
MSR CPSR, transferred the contents of R0 to R0 @ CPSR
the MSR SPSR, the contents of R0 R0 @ transferred to the SPSR
the MSR cpsr_c, transferred the contents of R0 to R0 @ SPSR, but only modify the control bit field in the CPSR

 

3.BIC

BIC instruction format is: BIC {Conditions} {S} destination register operand 1, operand 2

BIC instructions to clear certain bits in the operand 1, and place the result in the destination register.

1 should operand is a register operand 2 may be a register, a shift register or an immediate constant.

2 is a 32-bit operand mask, if a bit is set to 1 in the mask, it will be cleared. Mask bit is not set remains unchanged.

BIC  R0,R0,#0x1F

0x1F=0001 1111

Meaning: Clear bit R0 [4: 0]

 

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Origin www.cnblogs.com/cxl-93/p/11009447.html