Assembler language of physical address

Disclaimer: This article is a blogger original article, follow the CC 4.0 BY-SA copyright agreement, reproduced, please attach the original source link and this statement.

This link: https://blog.csdn.net/qq_29983883/article/details/102753250

16 cpu structural features

Operator can handle a maximum of 16-bit data of
the maximum width of the register 16 is
the path between the register and the arithmetic unit 16 are

The method gives the physical address 8086cpu

8086cpu 20 bit address bus, 20-bit address may be transmitted, i.e. 1M addressability, and 8086 is 16-bit configuration, the address in the interior of the disposable processing, transmission, temporarily stored as 16 bits, only 64KB addressability
8086cpu 20 uses a method for forming an internal address synthesis of two 16-bit physical address

Related cpu component provides two 16-bit address, called a segment address, a called address offset
means the address and the segment offset address is fed through an internal bus called the address adder
address adder 16 the two synthesis of a 20-bit address of the physical address (physical address) = (segment address) * 16 + (offset address)
address adder 20 through an internal bus address into a physical input-output control circuit
input and output control circuit 20 physical send address bus address
20 physical address is transferred to the memory bus