Beyond providing a node value generation technology to stay ahead
Xilinx new 16 nm and 20 nm UltraScale ™ series, based on the first framework, covering not only a plurality of nodes from a higher level to FinFET technology and even technology, but can also extend from a monolithic IC to 3D IC. 20 in the field of nanotechnology, Xilinx pioneered the first ASIC-Class architecture, not only supports hundreds of Gb level of system performance, support intelligent processing at full line speed, but also extended to Tb and Tf levels. In terms of 16-nanometer process, UltraScale + series will be a new memory, 3D-on-3D and multi-processing SoC (MPSoC) the perfect combination of technology, can realize the value of lead generation.
The new Xilinx UltraScale + FPGA family includes Kintex® UltraScale + FPGA and Virtex® UltraScale + FPGA and 3D IC series, Zynq®UltraScale + family contains the industry's first fully programmable MPSoC. System level UltraScale + were optimized to deliver value far exceeds conventional process node transplantation (as compared to 28 nm device, system performance per watt increased by 2 to 5 times), a substantial increase in system integration and intelligence, and the highest level of security.
The main innovation UltraScale architecture
- A method for routing generation efficiency of 90%, similar to the ASIC clock and logic enhanced infrastructure
- A high speed memory in series helps to eliminate the bottleneck of a DSP and packet processing.
- Enhanced DSP Slice integrated 27 x 18 bit multipliers and two adders, and can significantly improve point IEEE Std 754 floating point performance and efficiency.
- 3D IC chip bandwidth between a step function increase can be achieved virtual single-chip design
- Bulk I / O bandwidth by significantly reducing the latency plus a plurality of integrated ASIC implementation stage module may be provided for the RS-FEC Ethernet 100G, 150G Interlaken and PCIe® Gen4
- Various functional elements on the static / dynamic power gating can significantly save power
- By AES bitstream decryption authentication, key processing method, and fuzzy advanced programming enable next-generation security device security applications.
- DDR4 support up to 2,666 Mb / s of bandwidth, mass storage interface
- UltraRAM provide large on-chip memory, the SRAM device integrated support
- Innovative IP interconnect technology optimized performance per watt advantages can be further increased by 20% to 30%
- MPSoC technology will combine hardware and software engine that supports real-time control, graphics and video processing, waveform and packet processing, and multi-level security, safety and reliability