I am learning verilog for the first time. If there are any bad things done, welcome to point out
elevator control system
Development board: BASYS3
Development environment: Vivado 2019.1
Author: Jaye
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1. Requirements
(1) Realize the functions of elevator state judgment, elevator up and down stairs control module, elevator door opening and closing module, elevator lifting module, elevator indicator light module, elevator digital tube display module, etc.;
(2) In order to realize the control circuit logic of the elevator on the four floors, such as door opening, door closing, uplink, and downlink;
(3) Use the top-down method to conduct demand analysis and circuit design for the circuit of the elevator control system;
(4) In the Vivado integrated development environment, write programs in Verilog language to realize the above-mentioned functional logic functions;
(5) Test on the FPGA Basys 3 development board.
2. Module design
The circuit is divided into the following nine module designs: 1. Top module, 2. Button debounce module, 3. Up and down stairs control module, 4. LED module, 5. Nixie tube display module, 6. Door switch control module, 7. Call module, 8. Button response module in the elevator, 9. Button simulation module.
3. Operation method
See the bilibili video, the link is as follows: https://www.bilibili.com/video/BV1gT411g7dZ?share_source=copy_web
4. Other instructions
If the project cannot be opened or run normally, you can create the project yourself in Vivado, and then import the .v files and .xdc files in the "verilog source files and constains files" folder into your project respectively.
If you open the project directly, select "elevator_demo" when selecting the folder.
Git warehouse address: https://github.com/Jaye-Xue/ElevatorControlSystem
If you can't open it now, you can also download it from Baidu Cloud:
Link: https://pan.baidu.com/s/1b3wmlciU6jp9JpkXHuWHaQ?pwd=abcd
Extraction code: abcd
Demo video: https://www.bilibili.com/video/BV1gT411g7dZ?share_source=copy_web