stm32 IICCommunication

IIC communication

The IIC bus is a general data bus with two communication lines (SCL (Serial Clock Bus), SDA (Serial Data Bus)).
Features: synchronous, half-duplex, with data response, support bus mount multiple devices

1. Hardware circuit

The SCLs of all IIC devices are connected together, and the SDAs are connected together.
Both SCL and SDA are configured as open-drain output mode.
SCL and SDA each add a pull-up resistor, and the resistance value is generally about 4.7 kΩ.
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Two, IIC timing basic unit

Start time: During the high level of SCL, SDA switches from high level to low level.
Termination time: During SCL high level, SDA switches from low level to high level.
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Send a byte: during the low level of SCL, the master puts the data bits on the SDA bus in turn (high bit first), and then releases SCL, and the slave will read the data bits during the high level of SCL, so during the high level of SCL SDA does not allow data conversion, and it can send a byte by looping 8 times in sequence.
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Receive a byte: During the low level of SCL, the slave puts the data bits on the SDA line in turn (high bit first), and then releases SCL. The master will read the data bits during the high level of SCL, so SDA during the high level of SCL Data changes are not allowed, and one byte can be received after cycling 8 times in sequence.
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Send response: After receiving a byte, the host sends a bit of data in the next clock, data 0 means response, data 1 means non-response.
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Receiving response: After sending a byte, the host receives a bit of data at the next clock to judge whether the slave responds, data 0 indicates response, and data 1 indicates non-response (the host needs to release SDA before receiving).
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3. IIC Timing

1. Specify the address to write

For the specified device (Slave Address), write the specified data (Data) under the specified address (Reg Address).
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2. Current address read

For the specified device (Slave Address), read the slave data (Data) at the address indicated by the current address pointer.
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3. Specified address read

For the specified device (Slave Address), read the slave data (Data) under the specified address (Reg Address).
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Origin blog.csdn.net/weixin_68153081/article/details/131909954