IIC bus learning

1. Bus idle state.

When the bus is idle, both SDA and SCL are high.

2. The start and stop conditions of the IIC bus.

Start condition: When SCL is high, the SDA bus is pulled low, that is, a negative transition occurs.
Termination condition: When SCL is high, the SDA bus is pulled high, that is, a positive transition occurs.
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3. Data transmission of IIC bus

The data of the high level device remains stable, and the data can change during the low level.
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4. IIC bus response

Response from the device: the master device, every time 8 bits are sent, the master device releases the bus at the 9th bit, and the slave device sends a response signal, indicating that the slave device has received the data signal. Pull the bus low to acknowledge.
Master device non-response: If the master device reads data, when the master device receives the data from the slave device, it will send a response, low level, to notify the data sending device that the master device has successfully received. When the last byte is received, the slave sends a non-acknowledgement to indicate the end of reception.

5. IIC timing

The IIC bus can mount multiple slave devices. When accessing the bus device, first send the slave device address, then send the slave device byte address, and then send data.
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Origin blog.csdn.net/qq_35318223/article/details/130870931
IIC