SCK
SDA
the IIC bus from a predetermined different types of machine have different IIC ADRESS, access from the host
when the machine needs to provide the IIC ADRESS machine
disadvantages: a pull-up half duplex susceptible to interference with inter-stage pull-chip communication easy
1. https://blog.csdn.net/tianshiyalin/article/details/24504539
the IIC bus is to receive it pullup resistor
2.1 master to the slave communication
PSELSCL, PSELSDA of SDA IIC bus, SCL pin select register
communication process:
start condition - device address + write flag - slave ACK- first byte - the first N bytes of slave ACK- ---- slave
the ACK ----- stop condition.
After starting startttx, NRF51522 controller generates a start condition: the SCL the SDA. 1 = = l-> 0;
when the transmission of a byte, the next clock pulse generates an ACK signal from the opportunity, SDA = 0, IIC controller detects ACK after generating a TXDSENT EVENT, indicate that they have been transmitted, continue to send a byte to the write
data send finished, we start sTOP task, IIC controller generates a stop condition on the bus: the SCL = 1, the SDA = 0-> 1;
2.2 slave to master communication
A: slave start condition - the device address of the write flag + - transmitting the first byte to slave ACK- IIC slave controller - the host sends a response signal - ... - N transmitted from the first machine bytes to the controller IIC - stop condition.
When we start STARTTRX task, NRF51822 controller generates a start condition on the bus IIC: SXL = 1; SDA = 1- > 0
for each byte received from a machine, the controller generates a RXDRDY IIC signal, to notify the CPU RXD removed data, when the data receiving end field, we start SROP task, IIC controller generates a stop condition on the bus: SCL = 1, SDA = 0- > 1;
3. Register Description Related
3.1 SHOTS short register. NRF51822 a specific function can be linked with BB SUSPEND, STOP.
3.2 INTEN interrupt enable register. Writing 1, the corresponding bit of the interrupt is enabled
3.3 INTENCLR interrupt clear register. Write 1, the corresponding bit of the interrupt is closed.
3.4 ERRORSRC When the communication error interrupt generated in the process, we can read this register, obtain Cause The
3.5 ENABLE IIC enable register. When configured as a value of 5, IIC controller is enabled; time 0, IIC controller is switched off.
3.6 PSELSCL IIC clock line SCL pin select register, which is used to select the SCL signal as GPIO NRF51822 foot.
3.7 PSELSDA IIC data line SDA pin selection register used to select which signal GPIO pin as the SCA. NRF51822 of
3.8 RXD IIC data receive register. NRF51822 data sent from the device will be stored here.
3.9 TXD IIC data transmit register. When NRF51822 to send data from the device before, you put the data to be transmitted into this register
3.10 FREQUENCY IIC clock frequency configuration registers, 100K 250K, 400K three frequencies.
3.11 ADDRESS slave device address register, read or write when NRF51822 need to discharge from the device when the device address from the
write procedure 4.
4.1 write process
1) First, the address of the device into the address register.
2) Start STARTTX start writing.
3) into the data to be transmitted TXD register.
4) Wait signal TXDSENT
5) If there is data, the subsequent data will continue into the TXD, and returns to step 4, else go to step 6.
6) Set STOP register IIC stop and wait.
4.2 a read operation flow
1) First, the address of the device into the address register.
2) Start STARTTX TASK start writing.
3) the data (register address) is written to be transmitted TXD register.
4) wait TXDSENT event to determine the data sent.
5) determining whether only one byte of data is read, if not set SHORTS BB event and the SUSPEND task
automatically trigger SUSPEND task shorted (BB evnet generation), and otherwise set BB event STOP task short.
6) Start STARTRX TASK.
7) wait RXDRDY event, extract the data. If only one follow-up data to be read, and then set the BB event and
STOP task shorted and jump to 8, otherwise continue 7.
8) Wait STOPED signal.
This example shows that NRF51822 IIC bus by now - the Electronic NRF51822EK_TM development board
MPU6050 communication, read out the signature WHO AM I register MPU6050, if the reading is successful, the board's
LED1 bright, if unsuccessful, LED0 bright.
Program flow 4.3 Example
1) Configuration GPIO, used to light up LED1, LED0.
2) Configuration PSELSDA, PSELSCL GPIO selected for IIC communications. You can refer to a circuit diagram of the development board.
3) By enabling ENABLE, to enable the controller IIC.
4) NRF51822 commanding read value WHO AM I register.
5) the received value WHO AM I register MPU6050 emitted.
6) such as an LED display read success.