Access pcie bus address content

The calling code is as follows:

    uint32_t value;
    void * addr;
    printk("------1--------\n");

    addr=0x2730000;
    struct resource *res;
    char const *name = dev_name(&pdev->dev);
    printk("dev_name=%s\n", name);
    res = request_mem_region(addr, 16, "name1");
    if(res == NULL){
    
    
        printk("request_mem_region failed\n");
        return -ENOMEM;
    }

    void * ioaddr;
    ioaddr = ioremap(res->start, resource_size(res));
    value = readl(ioaddr);
    printk("-----addr=0x%x  value=0x%x\n",ioaddr, value);
    iounmap(ioaddr);
    release_region(addr, 16);

Use cat /proc/iomem:
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What is this for? In fact, when you:

   //addr=0x2002730000;
    addr=0x100000000;
    struct resource *res;
    res = request_region(addr, 8, "name1");

When the memory is used, it will be recorded here that the memory is used, and others should not use it.
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We can check the PCI bus information through lspci:

root@synopsys-VirtualBox:~# lspci -d 1e36: -v
01:00.0 FireWire (IEEE 1394): Shanghai Enflame Technology Co. Ltd Device 8031 (rev 01) (prog-if 00 [Generic])
Flags: fast devsel, IRQ 5
Memory at e2900000 (32-bit, non-prefetchable) [size=16K]
Memory at e3000000 (32-bit, non-prefetchable) [size=8M]
Memory at 1400000000 (64-bit, prefetchable) [size=16G]
Memory at 1800000000 (64-bit, prefetchable) [size=256M]
Expansion ROM at e2904000 [virtual] [disabled] [size=2K]
Capabilities: [40] Power Management version 3
Capabilities: [50] MSI: Enable- Count=1/16 Maskable- 64bit+
Capabilities: [70] Express Endpoint, MSI 00
Capabilities: [b0] MSI-X: Enable- Count=8 Masked-

The address is not calculated in this way. You can see that the physical address of the register bar is e3000000. You come out of this address map 8M, and then access the place at offset2730000

Access pcie bus address content

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