Serial port initialization structure and firmware library explanation

6 commonly used functions, structures:

  1. USART initialization structure (USART_InitTypeDef)
  2. USART clock initialization structure (USART_ClockInitTypeDef)
  3. Serial port enable function void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState)
  4. Data sending function void USART_SendData(USART_TypeDef* USARTx, uint16_t Data)
  5. Data receiving function uint16_t USART_ReceiveData(USART_TypeDef* USARTx)
  6. Interrupt status bit get function ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT)

 

USART initialization structure (USART_InitTypeDef)

The initialization structure is defined in the stm32f10x_usart.h file, and the initialization library function is defined in the stm32f10x_usart.c file. We can use the comments in these two files when programming.

 typedef struct {
 uint32_t USART_BaudRate; // Baud rate 
 uint16_t USART_WordLength; // Word length 
 uint16_t USART_StopBits; // Stop bits 
 uint16_t USART_Parity; // Parity bit 
 uint16_t USART_Mode; // USART mode 
 uint16_t USART_HardwareFlowControl; // Hardware flow control 
 } USART_InitTypeDef;

Structure members:

      1) USART_BaudRate: Baud rate setting. Generally set to 2400, 9600, 19200, 115200. The standard library function will calculate the USARTDIV value according to the set value, thereby setting the USART_BRR register value.

     2) USART_WordLength: data frame word length, optional 8 bits or 9 bits. It sets the value of the M bit of the USART_CR1 register. If parity control is not enabled, 8 data bits are generally used; if parity is enabled, it is generally set to 9 data bits.

     3) USART_StopBits: stop bit setting, optional 0.5, 1, 1.5 and 2 stop bits, it sets the value of the STOP[1:0] bits of the USART_CR2 register, generally we choose 1 stop bit.

    4) USART_Parity: Parity control selection, optional USART_Parity_No (no parity), USART_Parity_Even (even parity) and USART_Parity_Odd (odd parity), which sets the value of the PCE bit and the PS bit of the USART_CR1 register.

    5) USART_Mode: USART mode selection, there are USART_Mode_Rx and USART_Mode_Tx, allowing to use logical OR operation to select two, it sets the RE bit and TE bit of the USART_CR1 register.

   6) USART_HardwareFlowControl: Hardware flow control selection, which is valid only in hardware flow control mode, options include (1) enable RTS, (2) enable CTS, (3) enable both RTS and CTS, and (4) disable hardware flow.

USART clock initialization structure (USART_ClockInitTypeDef)

     When using synchronous mode, you need to configure the properties of the SCLK pin output pulse. The standard library uses a clock initialization structure USART_ClockInitTypeDef to set, and the content of this structure needs to be set only in synchronous mode.

 typedef struct {
 uint16_t USART_Clock; // clock enable control 
 uint16_t USART_CPOL; // clock polarity 
 uint16_t USART_CPHA; // clock phase 
 uint16_t USART_LastBit; // last bit clock pulse
 } USART_ClockInitTypeDef;

Polarity and phase are used in conjunction with this: polarity indicates whether the serial port is high or low when it is idle, and phase refers to whether the first edge captures data or the second edge captures data.

1

Structure members:

     1) USART_Clock: Clock output enable control on the SCLK pin in synchronous mode, you can choose to disable the clock output (USART_Clock_Disable) or enable the clock output (USART_Clock_Enable); if you use the synchronous mode to send, generally you need to turn on the clock. It sets the value of the CLKEN bit of the USART_CR2 register.

     2) USART_CPOL: The polarity of the output clock on the SCLK pin in synchronous mode can be set to a low level (USART_CPOL_Low) or a high level (USART_CPOL_High) when the SCLK pin is idle. It sets the value of the CPOL bit of the USART_CR2 register.

    3) USART_CPHA: The output clock phase setting on the SCLK pin in synchronous mode can be set to capture data on the first changing edge of the clock (USART_CPHA_1Edge) or capture data on the second changing edge of the clock. It sets the value of the CPHA bit of the USART_CR2 register. USART_CPHA is used in conjunction with USART_CPOL to obtain multiple mode clock relationships.

    4) USART_LastBit: Select whether the clock pulse is output on the SCLK pin when the last data bit is sent. It can be no pulse output (USART_LastBit_Disable) or output pulse (USART_LastBit_Enable). It sets the value of the LBCL bit of the USART_CR2 register.

 

Serial port enable function

void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState)

data sending function

void USART_SendData(USART_TypeDef* USARTx, uint16_t Data)

data receiving function

uint16_t USART_ReceiveData(USART_TypeDef* USARTx)

Interrupt Status Bit Get Function

ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT)

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