In the process of using FPGA, it is usually necessary to evaluate resources. Let's briefly talk about how to evaluate the resources of FPGA.
Number of FFs and LUTs:
This is usually impossible for beginners to estimate before writing specific code, but senior FPGA engineers can estimate an order of magnitude. The usual practice is that after the system architecture is divided, the modules that can be reused are estimated according to the resource consumption in the previous design, and the new modules are estimated after the code is written.
RAM：
After the implementation of this block is determined, it can be basically estimated accurately. Each module needs to use several FIFOs and several RAMs. Finally, the number of RAMs in the entire system can be determined. The premise is that all functions are implemented in a well-designed way.
Multiplier:
This is consistent with the RAM estimation above.
Phase Locked Loop, Clock Distributor, Clock Resources:
This part is determined according to the clock frequency of each module after the system design architecture is completed.
Number of IO pins:
This part is actually strongly related to the demand. Basically, the demand is determined and the implementation method is determined.
Special IO:
This part of the estimation is sometimes related to the hardware interface, and sometimes related to the implementation. For example, the number of LVDS is usually determined by the connected hardware devices, and the DDR part needs to be determined according to the system implementation, determining the DDR bandwidth, frequency, bit width of the interface, etc., so the demand for DDR IP CORE comes out. .
In short, the more common practice in the case of inexperience is to implement the main functions on a relatively large development board, and then directly look at the resources after synthesizing on the synthesis tool.
Copyright ownership belongs to Qingcui Technology Hangzhou FPGA Division , please indicate the source for reprinting
Author: Hangzhou Qingcui Technology ALIFPGA
Original address: Hangzhou Qingcui Technology FPGA Geek Space WeChat Official Account
Scan the QR code to follow Hangzhou Qingcui Technology FPGA Geek Space