table of Contents
2.1, external crystal oscillator (2 crystal oscillators)
2.2, external crystal oscillator (1 crystal oscillator)
In the previous tweets, " SMI interface of STM32 network ", " MII and RMII interface of STM32 network ", introduced all the interfaces of STM32 Ethernet and external PHY.
If some students are not familiar with SMI, MII and RMII interfaces, it is recommended to read the two articles mentioned above, otherwise they may not understand the following.
Area 1: We call it the SMI interface, which is used to configure the external PHY chip.
Area 2: It is the data exchange interface, which is the MII interface and RMII interface we mentioned above.
There are many different network circuit design schemes using these interfaces, here I will summarize.
01, MII interface solution
The MII interface has been introduced in detail in the article " MII and RMII in STM32 Networks ", from which we know that a 25MHz clock is required.
For the MII interface, the most commonly used solution is to connect a 25MHz crystal oscillator to the STM32.
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The internal PLL configures HCLK and provides it to the core and peripherals.
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The external PHY connection provides a 25MHz MCO pin.
This solution is suitable for STM32F107/2x7/4x7.
02, RMII interface solution
The RMII interface has been introduced in detail in the article " MII and RMII in STM32 Networks ", from which it is known that a 50MHz clock is required.
2.1 , external crystal oscillator (2 crystal oscillators )
This solution requires two external crystal oscillators.
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External 25MHz crystal oscillator, internal PLL configuration HCLK, provided to the core and peripherals, etc.
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External 50MHz crystal oscillator, output 50MHz clock, provide to MAC controller and external PHY.
This solution is suitable for STM32F107/2x7/4x7.
2.2 , external crystal oscillator (1 crystal oscillator )
This kind of scheme only needs to connect a 50M crystal oscillator externally. A crystal oscillator provides clock for STM32 and external PHY at the same time, which can save cost.
Important: STM32F2X7 can't use this kind of scheme, only suitable for STM32F107/4x7.
Everyone pay attention to the difference in the above picture
This is because the OSC part of the HSE is filtered out, through the bypass of the HSE, the 50MHz clock has been input to the PLL through the OSCIN, and then the clock for the core and peripherals is generated through the PLL.
2.3. Need a powerful PHY
This solution also uses a 25MHz crystal oscillator, but requires a powerful PHY chip. This PHY can internally multiply the input 25MHz clock to a 50MHz clock, and then output it to the STM32 MAC control module.
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External 25MHz crystal oscillator, internal PLL configuration HCLK, provided to the core and peripherals, etc.
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STM32 provides 25MHz clock to external PHY through MCO pin.
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The external PHY generates a 50MHz clock and provides it to the MAC control module of STM32.
This solution is suitable for STM32F107/2x7/4x7.
Personally do not recommend this kind of scheme, which is not conducive to the replacement of materials later.
