Previous explains why we need
make
, andmake
how to solve pain points of the program building.
[Makefile] - GNU make order & origin
of the article will still be described furtherMakefile
, by these two hope to make youmake
,Makefile
have an emotional understanding.
Article Directory
Makefile contents
Makefile
It mainly contains the following contents:
-
Explicit rules . Explicit rules are clearly given by us, such as: how to generate the target file, what are the dependent files of the file, and the generated commands all belong to this category.
-
Obscure rules . That is the implicit rules a talk; because the
make
automatic derivation function, obscure rules can help us write fastermakefile
. -
Variable . On a macro involved;, when
makefile
executed,makefile
the variables will be extended to the corresponding reference positions. -
Makefile indicator . It is indicated in the
make程序
readmakefile
operation of the process to be executed. Contains the following three parts:-
Reading files in a given file name, and as
makefile
part of (similarC include
). -
According to the conditions ignored
makefile
part (similar to theC
conditional compilation#if
) -
Define multi-line variables (multi-line definition)
-
-
Annotation .
makefile
There are only line comments in the file#字符
. If the end of the comment line exists反斜杠\
, the next line is also regarded as a comment line. If we need to use it#字符
, we need it转义 \#
.
Note :
makefile
All subsequent to the first rule Tab
line begins, the make
program will be sent by the system shell
program interpreted. So if it is Tab
the beginning of the comment line will be sent to the shell
process.
Makefile filename
By default, it make
will search in the working directory makefile
. The search follows the following order:
GNUmakefile > makefile > Makefile
GNUmakefile
Only GNUmake
in order to identify, and therefore not recommended. Generally used Makefile
(more eye-catching).
If you can not find in the working directory makefile
file, it will not read any file as an analytical object make将报错
.
By help
we find make
instruction has one -f
option can be specified Makefile
, then the specified file can be arbitrary.
Include other Makefile
In the Makefile
use of include
keywords you can put other Makefile
included. The included files will be replaced intact include的位置
.
include <filename>
make
Instruction begins, look for include
the indicated Makefile
replaced. If not specified an absolute path, look for a priority in the current path, if not found, will be in make
the implementation of "-I"/"-- include-dir"
looking (if any) under the parameters specified path; if not found, the directory <prefix>/include
exists will take to find (usually /usr/local/bin
or /usr/include
) .
If none is found, a warning will be generated. Pending makefile
file reading is completed, make
we will try to find those not found / unable to read a file again, or if can not read, will error and stop running .
If we want to make
ignore those files can not be read to continue, simply include
add front -
can be.
-include <filename>
variable
MAKEFILES
If we define the environment variable MAKEFILES
, then make
before the execution, MAKEFILES
the specified file will be include
. It and include
what difference is it?
- From this environment variables into the
makefile
goal will not work, if not found in the working directory or the default path tomakefile
the file, the same will complain - If the file defined in the environment variable is sent incorrectly,
make
ignore it (neither exit nor report an error, so it is more dangerous) make
When executed, first read theMAKEFILES
specified file, and then only to find in the working directorymakefile
. Theinclude
specified file, ismake
to stop parsing the currentmakefile
resolved in favor of readinginclude
the specified file.
Variable MAKEFILES
mainly used in make
communication during the recursive call.
Note :
Because this environment variable settings, all make
are effective. This is prone to confusion, and it is not conducive to transplantation, so use as little as possible.
Hey, if make
some strange problems, try looking at whether related to the environment variable.
MAKEFILE_LIST
When the make program reads multiple makefile files, including those specified by MAKEFILES, those specified by the command line, the default in the current working directory, and those included with the indicator include... Before these files are parsed and executed, the file name read by make will be Will be automatically appended to the definition domain of the variable MAKEFILE_LIST.
Other characteristic variables
GNU make
Support a special variable, this variable cannot be assigned by any method. This variable is .VARIABLES
. After it is expanded, it is a makefile
list of all global variables defined in the file before this reference point . Comprising: a null variables and make
implicit variable, but does not contain the specified target variable, the target variable values valid in the context specified specific target.
How make works (how to parse Makefile)
GNU make
There are two stages at work:
- The first stage . Read all
makefile
(includinginclude
thosemakefile
), initialize the variables in the file; derive implicit rules, and analyze all rules. After the completion of these, you can build the target file dependency chain . - The second stage . Determine which targets need to be updated through the dependency chain, and use the corresponding rules to rebuild these targets.
If it is further subdivided, it can be divided into the following steps:
- Sequentially read variables
MAKEFILES
definedmakefile
list of files - Read in the working directory
makefile
file (named according to the search orderGNUmakefile
, ,makefile
,Makefile
first find that you read that) - Working directory in order to read
makefile
a file using the indicatorsinclude
included files - Find rebuild all read
makefile
the rules of the file (if there is a current goal is to read a certainmakefile
file, the rule is executed rebuild thismakefile
file after completing the first step to start re-execution) - Initialize variable values and expand those variables and functions that need to be expanded immediately and determine the execution branch according to preset conditions
- According to the ultimate goal of establishing a dependency chain dependencies and other targets
- In addition to the implementation of the ultimate goal of all rules other than the target (dependent on the rule if the timestamp of any file of a file is newer than the destination file, use the command rules defined by the reconstruction project file)
- Perform the ultimate goal rule is in
Reference thanks
Cheng Hao "Write Makefile with Me"
Xu Haibing translated "GNU make Chinese Manual"
Whispered: The content is the same with little difference...