[Makefile] --GNU make description

Previous explains why we need make, and makehow to solve pain points of the program building.
[Makefile] - GNU make order & origin
of the article will still be described further Makefile, by these two hope to make you make, Makefilehave an emotional understanding.

Makefile contents

Makefile It mainly contains the following contents:

  • Explicit rules . Explicit rules are clearly given by us, such as: how to generate the target file, what are the dependent files of the file, and the generated commands all belong to this category.

  • Obscure rules . That is the implicit rules a talk; because the makeautomatic derivation function, obscure rules can help us write faster makefile.

  • Variable . On a macro involved;, when makefileexecuted, makefilethe variables will be extended to the corresponding reference positions.

  • Makefile indicator . It is indicated in the make程序read makefileoperation of the process to be executed. Contains the following three parts:

    • Reading files in a given file name, and as makefilepart of (similar C include).

    • According to the conditions ignored makefilepart (similar to the Cconditional compilation #if)

    • Define multi-line variables (multi-line definition)

  • Annotation . makefileThere are only line comments in the file #字符. If the end of the comment line exists 反斜杠\, the next line is also regarded as a comment line. If we need to use it #字符, we need it 转义 \#.

Note :
makefileAll subsequent to the first rule Tabline begins, the makeprogram will be sent by the system shellprogram interpreted. So if it is Tabthe beginning of the comment line will be sent to the shellprocess.

Makefile filename

By default, it makewill search in the working directory makefile. The search follows the following order:

GNUmakefile > makefile > Makefile

GNUmakefileOnly GNUmakein order to identify, and therefore not recommended. Generally used Makefile(more eye-catching).

If you can not find in the working directory makefilefile, it will not read any file as an analytical object make将报错.

By helpwe find makeinstruction has one -foption can be specified Makefile, then the specified file can be arbitrary.
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Include other Makefile

In the Makefileuse of includekeywords you can put other Makefileincluded. The included files will be replaced intact include的位置.

include <filename>

makeInstruction begins, look for includethe indicated Makefilereplaced. If not specified an absolute path, look for a priority in the current path, if not found, will be in makethe implementation of "-I"/"-- include-dir"looking (if any) under the parameters specified path; if not found, the directory <prefix>/includeexists will take to find (usually /usr/local/binor /usr/include) .

If none is found, a warning will be generated. Pending makefilefile reading is completed, makewe will try to find those not found / unable to read a file again, or if can not read, will error and stop running .

If we want to makeignore those files can not be read to continue, simply includeadd front -can be.

-include <filename>

variable

MAKEFILES

If we define the environment variable MAKEFILES, then makebefore the execution, MAKEFILESthe specified file will be include. It and includewhat difference is it?

  • From this environment variables into the makefilegoal will not work, if not found in the working directory or the default path to makefilethe file, the same will complain
  • If the file defined in the environment variable is sent incorrectly, makeignore it (neither exit nor report an error, so it is more dangerous)
  • makeWhen executed, first read the MAKEFILESspecified file, and then only to find in the working directory makefile. The includespecified file, is maketo stop parsing the current makefileresolved in favor of reading includethe specified file.

Variable MAKEFILESmainly used in makecommunication during the recursive call.

Note :

Because this environment variable settings, all makeare effective. This is prone to confusion, and it is not conducive to transplantation, so use as little as possible.

Hey, if makesome strange problems, try looking at whether related to the environment variable.

MAKEFILE_LIST

When the make program reads multiple makefile files, including those specified by MAKEFILES, those specified by the command line, the default in the current working directory, and those included with the indicator include... Before these files are parsed and executed, the file name read by make will be Will be automatically appended to the definition domain of the variable MAKEFILE_LIST.

Other characteristic variables

GNU makeSupport a special variable, this variable cannot be assigned by any method. This variable is .VARIABLES. After it is expanded, it is a makefilelist of all global variables defined in the file before this reference point . Comprising: a null variables and makeimplicit variable, but does not contain the specified target variable, the target variable values valid in the context specified specific target.

How make works (how to parse Makefile)

GNU make There are two stages at work:

  • The first stage . Read all makefile(including includethose makefile), initialize the variables in the file; derive implicit rules, and analyze all rules. After the completion of these, you can build the target file dependency chain .
  • The second stage . Determine which targets need to be updated through the dependency chain, and use the corresponding rules to rebuild these targets.

If it is further subdivided, it can be divided into the following steps:

  • Sequentially read variables MAKEFILESdefined makefilelist of files
  • Read in the working directory makefilefile (named according to the search order GNUmakefile, , makefile, Makefilefirst find that you read that)
  • Working directory in order to read makefilea file using the indicators includeincluded files
  • Find rebuild all read makefilethe rules of the file (if there is a current goal is to read a certain makefilefile, the rule is executed rebuild this makefilefile after completing the first step to start re-execution)
  • Initialize variable values ​​and expand those variables and functions that need to be expanded immediately and determine the execution branch according to preset conditions
  • According to the ultimate goal of establishing a dependency chain dependencies and other targets
  • In addition to the implementation of the ultimate goal of all rules other than the target (dependent on the rule if the timestamp of any file of a file is newer than the destination file, use the command rules defined by the reconstruction project file)
  • Perform the ultimate goal rule is in

Reference thanks

Cheng Hao "Write Makefile with Me"

GNU Make (raw meat)

Xu Haibing translated "GNU make Chinese Manual"

Whispered: The content is the same with little difference...

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Origin blog.csdn.net/weixin_40774605/article/details/106901561