GNU make (a): GNU make Overview

A, GNU make Overview

What 1. GNU make that?

GNU make is the Linux environment renowned engineering and building management tools that we can use a single command to compile, link that execute automatically help us to complete the building work. Currently, a large number of C / C ++ project using make as a project build tools, a large number of IDE uses make the same engineering construction strategy.

How 2. GNU make work?

Make nature is an interpreter for interpreting called Makefile script. The Makefile script tells how to make the source code to compile and link your program. In essence, the make by comparing the last modification time of the relevant documents to determine which files need to be updated, which files need to be updated, then do the following:

• For those who need to update the file, make use of it in the Makefile predefined commands to reconstruct the files;
• For those who need to update the file, make it do nothing.

Two, Makefile Profile

Makefile script writing is a relatively complex task, it has its own writing format, keywords and functions. Moreover, in the Makefile script you can use any Shell command provided by the host operating system to complete the operation you want to accomplish.

1. Makefile rules introduced

In Makefile, the rule is the most important part, by defining one or more rules how the profile is generated. Makefile Makefile a basic rules are as follows:

# 这里是单行注释。
Target : Pre[1] Pre[2] ... Pre[N]; Command[0]
    Command[1]
    Command[2]
    ...
    Command[M]

The main members of which included the following:

• Target : target rules . It is usually the following two elements:

  • Name of the file generated needs ;
  • Make the implementation of a name for the action .

  【note】

  1. You can have multiple targets, with intermediate spaces to separate .

  2. Action name means: sometimes desirable to make a specific set of instructions together, but its purpose is not to produce an object file.

     For example, make frequent need to clean up the generated file before, but this is clearly not clean up the file should be generated.

     At this point, you can clean(or any other name) as a target, and does not generate any in all of its files to the command line.

• The Pre : dependent rules . It is usually the following two elements:

  • List of file names to generate the desired goal ;
  • Generate a list of other goals goals needed ;
  • Hybridity above two cases .

  [Note] dependency can have more, with intermediate spaces to separate .

• the Command : Command-line rule . Shell refers to the command for generating a target need to perform, the following may occur in up to:

  • Add in all the dependencies behind a " ; " and then write command.
  • From the beginning of the next line and depend on the target appeared to [TAB] the beginning of the key, then write multiple commands.

  【note】

  1. Generally have more command, in units.
  2. Not recommended for write commands in the back row followed dependent, because it affects readability.

• Notes : other scripts and the same, using the "#" sign as a comment.

In all the rules, the default target of the first rule for the ultimate goal, which is generated by default make target; if the first rule is a multi-goal rule, then the first target is used as the ultimate goal.

Of course, Makefile usually also contains a lot of things in addition to the rules (follow us to discuss). But no matter how complex it is, it meets the most basic format described above .

How 2. make interpretation of the rules

According to (1) make a determination target needs to be generated

When you make maintenance work, whether it needs to generate a target in order to check the following:

1. Target does not exist, it is generated;
2. Target exists, but all depend on the target, there is at least one dependent, newer than the current target on the time stamp (indicating that after the last maintenance, rely on is modified) , then rebuild it;
3. do nothing.

Meanwhile, for the rule, make also has the following features:

1. If the target is not a file, and there is no dependence or command, then its time stamp is considered to be the latest (make sure it must have been executed) .
2. If a goal is not dependent on the ultimate goal, then even if it is defined, it will not be executed.

(2) make abstract data structures maintained

When found make a rule interpreter, which will in order to read its objectives, dependence and all commands, and maintains a data structure to store them. This implementation of data structures vary, but in order to help understand the characteristics of the above, we can abstract and understand it in the following way:

Wherein all of the target composition and a dependent circular linked list , and all the command is a single chain . When found necessary to make maintenance a goal, it will carry out the following tasks:

1. If the target does not exist, it is generated;

2. If the target is present, check all dependent rely sequentially from the first,

• If the current is dependent on a file, then check the timestamp to determine whether it regenerates;
• If the current dependence is a goal, then look for the "dependency objective" data structure, and try to maintain it ( this dependence as a goal to work recursively ).

3. How do make

Execute the terminal makecommand. When the make command, there are several options:

• -f : Specifies the file name of the Makefile.
• Target name : this goal as the ultimate goal.

If you do not use the -f option, then make the program performs default default selection:

• makefile
• Makefile (recommended, because it can and README, CHANGELIST and other documents together)

Third, write a simple HelloWorld script

As HelloWorld script, it should be as simple as possible. Therefore, we do not generate any document, just let the output string to the terminal.

[Example] : a simple Makefile script

# Makefile
HelloWorld:
    echo "hello, world"

In this Makefile script, we only write a rule: the HelloWorld , it does not have any dependencies, and only one command: echo "hello, world". When the Make interpreter interpreting the script, it will start the following work:

1. Read the script file;
2. Construction of the data structure of all the rules;
3. Find the ultimate goal HelloWorld;
4. We found HelloWorldthe target does not exist in the current file system (so it is not a file) , and do not rely on, so it must be executed.
5. Excuting an order:echo "hello, world"

[] Operating results :

[scott@localhost 0000]$ make
echo "hello, world"
hello, world
[scott@localhost 0000]$ make -f Makefile
echo "hello, world"
hello, world
[scott@localhost 0000]$ make HelloWorld
echo "hello, world"
hello, world
[scott@localhost 0000]$ make -f Makefile HelloWorld
echo "hello, world"
hello, world

Fourth, use make to compile the code

[Example] : Use make to maintain the code

/*
 * foo.h
 */
#ifndef _FOO_H_
#define _FOO_H_

void foo();

#endif

/*
 * foo.c
 */
#include <stdio.h>
#include "foo.h"

void foo()
{
        printf("hello, makefile\n");
}

/*
 * main.c
 */
#include "foo.h"

int main(int argc, char *argv[])
{
        foo();
        return 0;
}

# Makefile
HelloMakefile.elf: main.o foo.o
        gcc -o HelloMakefile.elf main.o foo.o
                
main.o: main.c
        gcc -c main.c -o main.o

foo.o: foo.c
        gcc -c foo.c -o foo.o

[] Operating results :

[scott@localhost 0000]$ ls
foo.c  foo.h  main.c  Makefile
[scott@localhost 0000]$ make
gcc -c main.c -o main.o
gcc -c foo.c -o foo.o
gcc -o HelloMakefile.elf main.o foo.o
[scott@localhost 0000]$ ls
foo.c  foo.h  foo.o  HelloMakefile.elf  main.c  main.o  Makefile
[scott@localhost 0000]$ ./HelloMakefile.elf 
hello, makefile