If you use GPIO, we must enable the GPIO clock. The clock of each peripheral of i.MX6 ULL can be independently enabled, and we can turn off the peripheral clock that is not in use, which can achieve the purpose of energy saving. If a peripheral is used, we must turn on the corresponding clock. Chapter 18 "Clock Controller Module (CCM)" of "I.MX6ULL Reference Manual" is an explanation of i.MX6ULL clock. We can look at the enable register of peripheral clock in this chapter. The registers related to peripheral clock enable are:
CCM_CCGR0
CCM_CCGR1
CCM_CCGR2
CCM_CCGR3
CCM_CCGR4
CCM_CCGR5
CCM_CCGR6 There
are 7 in total. Let's look at how the CCM_CCGR0 register enables a peripheral clock. The description of this register is shown in Figure 1:
We can see from the figure above that the CCM_CCGR0 register is 32 bits, every 2 bits control a peripheral clock, for example, bit1:bit0 controls the clock of aips_tz1, the operation of two bits is as follows:
00 //Turn off the peripheral clock in all modes
01 //Enable peripheral clock only in run mode
10 //Reserve
11 //Except for stop mode, the clock is turned on in all modes
If we want to turn on the peripheral clock of aips_tz1, we need to set both bit1 and bit0 of CCM_CCGR0 to 1, that is, CCM_CCGR0=3. If the peripheral clock of aips_tz1 is turned off, bit1 and bit0 of CCM_CCGR0 are both set to 0.
The functions of these seven registers, CCM_CCGR0-CCM_CCGR6, are similar, and each two bits control the clock of a peripheral. In order to facilitate the development, we will enable all peripheral clocks in the following routines. So far we can summarize the operation of GPIO into the following steps:
1. Enable the clock corresponding to GPIO
2. Set the IOMUXC_SW_MUX_CTL_PAD_XX_XX register, set the corresponding IO to the GPIO function
3. Set the IOMUXC_SW_PAD_CTL_PAD_XX_XX register, set the pull-up and pull-down of the GPIO, and drive Ability
4. Set input or output, whether to use interrupt, and the default output level
