We need to refer to Chapter 32 for the configuration of IO pins. In Chapter 9.1, we see that each IO has a "SW_MUX_CTL_PAD_XX_XX" register, such as SW_MUX_CTL_PAD_GPIO1_IO00. This register was introduced in Chapter 6.1, mainly used to configure the mode of the IO pin. Then we see in this chapter that there is also a "SW_PAD_CTL_PAD_XX_XX" register, such as "SW_PAD_CTL_PAD_GPIO1_IO00" register, as shown in Figure 1:
From the figure above, you can see that the address of the SW_PAD_CTL_PAD_GPIO1_IO00 register is 0X20E02E8, which is also a 32-bit register. We can see that the register is divided into several functional settings according to bits, as follows:
HYS (bit16): used to enable hysteresis comparison When the IO is used as an input function, it is valid and used to set whether the Schmitt trigger of the input receiver is enabled. If you need to reshape the input waveform, you can enable this bit. When this bit is 0, the hysteresis comparator is disabled, and when it is 1, the hysteresis comparator is enabled.
PUS (bit15-bit14) is used to set up and down resistors.
PUE (bit13) When the IO is used as an input, this bit is used to set the IO to use the pull-up or the state holder. The state holder is only useful when the IO is used as an input. When the external circuit is powered off, the IO port can maintain the previous state.
PKE (bit12) is used to enable or disable the pull-up/down/status keeper function.
When ODE (bit11) IO is used as output, this bit is used to disable or enable open-circuit output.
SPEED (bit7-bit6) When IO is used as output, this bit is used to set the IO speed.
DSE (bit5-bit3) is used to set the drive capability of IO when IO is used as output.
SRE (bit0) sets the slew rate.
