NXP Cortex-A7 i.MX6UltraLite has very rich peripheral resources. However, it should be reminded that these interfaces cannot be used at the same time. In order to provide the cost performance of the chip, the CPU manufacturer introduced the PINMUX architecture. Simply put, there is pin reuse. These interfaces mentioned above only use about 114 Each pin can have up to 9 functions, and each function can appear on different pins.
The hardware platform used for this development is Feiling's embedded OKMX6UL-C development board (product details: www.forlinx.com/69.htm). For other boards, please refer to the use as appropriate. The specific implementation steps are as follows:
There is in arch / arm / boot / dts / imx6ul-pinfunc.h
wps8458.tmp.jpg
wps8469.tmp.jpg
Available in arch / arm / boot / dts / imx6ul-14x14-evk.dts
wps846A.tmp.jpg
Expand the pin configuration: 0x0158 0x03E4 0x0000 1 0 0x1b0b1
0x0158 | 0x 03E4 | 0x000 0 | 0x 1 | 0x0 | 0x1b0b1mux_ctrl_ofs | pad_ctrl_ofs | sel_input_ofs | mux_mode | sel_input | pad_ctrl
以上参数在参考手册怎么确定的呢？
下面 以 LCD_DATA16复用为UART7_DCE_TX 为例说明复用管脚参数配置的方法。
注： 下述参考手册为《 IMX6ULRM.pdf》。
对于复用管脚的配置，应该在手册管脚复用的章节 （ IOMUXC） 中查找。但是在确定 pad name才方便，于是定义在 External Signals and Pin Multiplexing 章节，搜索 MX6UL_PAD_LCD_DATA16__UART7_DCE_TX 的中间部分 “ LCD_DATA16 ”可以直接跳转至LCD_DATA16引脚的寄存器章节。
其中 mux_ctrl_ofs 为 0x0158，mux_mode为ATL1，如图：wps847A.tmp.jpg
pad_ctrl_ofs 为 0x03E4，并根据此配置pad_ctrl 为 0x1b0b1 （配置上拉电阻、频率等等），如图：wps848B.tmp.jpg
input_ofs 查找 IOMUXC章节以SELECT_INPUT结尾的部分，中间选择UART7_DCE_RTS ，如果没有这里 sel_input_ofs=0x000即可，对应的sel_input为0即可。
如果有例如 MX6UL_PAD_ENET1_RX_ER__UART7_DCE_RTS ，如下图，所以 ENET1_RX_ER的sel_input_ofs=0x650。 所以 ENET1_RX_ER （ MX6UL_PAD_ENET1_RX_ER__UART7_DCE_RTS ） 的 sel_input=0x1 。wps848C.tmp.jpg
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For more i.MX6UL information, please pay attention to FETMX6UL-C core board details
Original link: https://www.forlinx.com/article_view_205.html