其实本来不想来介绍DAI，但是为了文档的完整性，还是放在这边，内容比较简单，就说了一个事情——DAI包含三种总线接口：AC97，I2S和PCM。
本篇来介绍DAI (Digital Audio Interface, 数字音频接口)
基于4.9.123版本内核 Documentation/sound/alsa/soc/DAI.txt
ASoC currently supports the three main Digital Audio Interfaces (DAI) found on
SoC controllers and portable audio CODECs today, namely AC97, I2S and PCM.
ASoC目前支持SoC控制器和便携式音频编解码器上的三种主要数字音频接口（DAI），即
AC97，I2S和PCM。
AC97
====
AC97 is a five wire interface commonly found on many PC sound cards. It is
now also popular in many portable devices. This DAI has a reset line and time
multiplexes its data on its SDATA_OUT (playback) and SDATA_IN (capture) lines.
The bit clock (BCLK) is always driven by the CODEC (usually 12.288MHz) and the
frame (FRAME) (usually 48kHz) is always driven by the controller. Each AC97
frame is 21uS long and is divided into 13 time slots.
AC97是许多PC声卡上常见的五线接口。 它现在在许多便携式设备中也很流行。 该DAI具有复
位线，并在其SDATA_OUT（回放）和SDATA_IN（捕获）线上对其数据进行时间复用。 位时
钟（BCLK）始终由CODEC（通常为12.288MHz）驱动，帧（FRAME）（通常为48kHz）始
终由控制器驱动。 每个AC97帧长21uS，分为13个时隙。
The AC97 specification can be found at :-
http://www.intel.com/p/en_US/business/design
I2S
===
I2S is a common 4 wire DAI used in HiFi, STB and portable devices. The Tx and
Rx lines are used for audio transmission, whilst the bit clock (BCLK) and
left/right clock (LRC) synchronise the link. I2S is flexible in that either the
controller or CODEC can drive (master) the BCLK and LRC clock lines. Bit clock
usually varies depending on the sample rate and the master system clock
(SYSCLK). LRCLK is the same as the sample rate. A few devices support separate
ADC and DAC LRCLKs, this allows for simultaneous capture and playback at
different sample rates.
I2S是HiFi，STB和便携式设备中常用的4线DAI。 Tx和Rx线用于音频传输，而位时钟(BCLK)
和左/右时钟（LRC）同步链路。 I2S非常灵活，控制器或CODEC可以驱动（主控）BCLK和
LRC时钟线。 位时钟通常根据采样速率和主系统时钟（SYSCLK）而变化。 LRCLK与采样率
相同。 一些器件支持单独的ADC和DAC LRCLK，这允许以不同的采样率同时捕获和回放。
I2S has several different operating modes:-
I2S有几种不同的操作模式： -
o I2S - MSB is transmitted on the falling edge of the first BCLK after LRC transition.
I2S - 在LRC转换后，在第一个BCLK的下降沿发送MSB。
o Left Justified - MSB is transmitted on transition of LRC.
左对齐 - 在LRC转换时发送MSB。
o Right Justified - MSB is transmitted sample size BCLKs before LRC transition.
右对齐 - 在LRC转换之前，MSB传输样本大小BCLK。
PCM
===
PCM is another 4 wire interface, very similar to I2S, which can support a more
flexible protocol. It has bit clock (BCLK) and sync (SYNC) lines that are used
to synchronise the link whilst the Tx and Rx lines are used to transmit and
receive the audio data. Bit clock usually varies depending on sample rate
whilst sync runs at the sample rate. PCM also supports Time Division
Multiplexing (TDM) in that several devices can use the bus simultaneously (this
is sometimes referred to as network mode).
PCM是另一种4线接口，与I2S非常相似，可以支持更灵活的协议。 它具有位时钟（BCLK）和
同步（SYNC）线，用于同步链路，而Tx和Rx线用于发送和接收音频数据。 位时钟通常根据
采样率而变化，而同步以采样率运行。 PCM还支持时分复用（TDM），因为几个设备可以同
时使用总线（这有时称为网络模式）。
Common PCM operating modes:-
常见的PCM操作模式： -
o Mode A - MSB is transmitted on falling edge of first BCLK after FRAME/SYNC.
模式A - 在FRAME / SYNC之后，在第一个BCLK的下降沿发送MSB。
o Mode B - MSB is transmitted on rising edge of FRAME/SYNC.
模式B - MSB在FRAME / SYNC的上升沿发送。