https://blog.csdn.net/pxy198831/article/details/86615497
DSP TMS320C5509A之ADC MAX121中的ADC芯片即是采用DMA的方式进行控制的，
设置为一个字节打断CPU一次，进行数据的处理，程序如下：
#include <csl.h>
#include <csl_mcbsp.h>
#include <csl_dma.h>
#include "Inc\dsplib.h"
#include "Inc\Globe.h"
#include "Inc\DMA.h"
#include "Inc\fdacoefs.h"
#include "Inc\fdacoefs_audio_bp.h"
#include "Inc\fdacoefs_audio_hp.h"
#include "Inc\sin_table.h"
/* dst data table address */
#pragma DATA_SECTION(dstPing,".globe_para");
Uint16 dstPing[ADC_N];
#pragma DATA_SECTION(dstPing,".globe_para");
Uint16 dstPong[ADC_N];
#pragma DATA_SECTION(pingpong,".globe_para");
Uint16 pingpong;
#pragma DATA_SECTION(agcBuf,".globe_para");
Uint32 agcBuf[AGC_DMA_N];
#pragma DATA_SECTION(audioBuf,".globe_para");
Uint16 audioBuf[AUDIO_DMA_N];
#pragma DATA_SECTION(audio_DDS,".globe_para");
int audio_DDS[1024];
Uint16 Index;
int head=0,rear=0;
TAGC_OUT *AGC_OUT;
//#define AGC_OUT ((TAGC_OUT *)agcBuf)
/*define NCO*/
//DDS NCO
#define K 4505
unsigned int rom_result;
unsigned int sin_addr;
unsigned int cos_addr;
int sin,cos;
#pragma DATA_SECTION(I_dbuf,".globe_para");
DATA I_dbuf[53];
#pragma DATA_SECTION(Q_dbuf,".globe_para");
DATA Q_dbuf[53];
#pragma DATA_SECTION(BP_dbuf,".globe_para");
DATA BP_dbuf[300];
#pragma DATA_SECTION(BP_dbuf_out,".globe_para");
DATA BP_dbuf_out[300];
#pragma DATA_SECTION(BS_dbuf,".globe_para");
DATA BS_dbuf[400];
//Step 2: Define and initialize the DMA channel configuration structure.
interrupt void dmaCh0Isr(void);
void dmaCh0Process(void); //处理收到的数据
void dmaDmod(void);
void IniDMA_CH0(void);
void IniDMA_CH1(void);
void IniDMA_CH2(void);
void IniDDS(void);
void IniFIR(void);
void IniDMAPara(void); //初始化DMA全局参数
int AGC_audio(int AGC_in);
/**/
#pragma DATA_SECTION(tmpadc,".input");
int tmpadc[1024];
int tmp_index;
//CH0用于ADC的采样
DMA_Config DMACH0_Cfg = { /* DMA configuration structure*/
DMA_DMACSDP_RMK(
DMA_DMACSDP_DSTBEN_NOBURST, /* Destination burst
DMA_DMACSDP_DSTBEN_NOBURST
DMA_DMACSDP_DSTBEN_BURST4
*/
DMA_DMACSDP_DSTPACK_OFF, /* Destination packing
DMA_DMACSDP_DSTPACK_ON
DMA_DMACSDP_DSTPACK_OFF */
DMA_DMACSDP_DST_DARAM, /* Destination selection
DMA_DMACSDP_DST_SARAM
DMA_DMACSDP_DST_DARAM
DMA_DMACSDP_DST_EMIF
DMA_DMACSDP_DST_PERIPH */
DMA_DMACSDP_SRCBEN_NOBURST, /* Source burst
DMA_DMACSDP_SRCBEN_NOBURST
DMA_DMACSDP_SRCBEN_BURST4 */
DMA_DMACSDP_SRCPACK_OFF, /* Source packing
DMA_DMACSDP_SRCPACK_ON
DMA_DMACSDP_SRCPACK_OFF */
DMA_DMACSDP_SRC_PERIPH, /* Source selection
DMA_DMACSDP_SRC_SARAM
DMA_DMACSDP_SRC_DARAM
DMA_DMACSDP_SRC_EMIF
DMA_DMACSDP_SRC_PERIPH */
DMA_DMACSDP_DATATYPE_16BIT /* Data type
DMA_DMACSDP_DATATYPE_8BIT
DMA_DMACSDP_DATATYPE_16BIT
DMA_DMACSDP_DATATYPE_32BIT */
), /* DMACSDP */
DMA_DMACCR_RMK(
DMA_DMACCR_DSTAMODE_POSTINC, /* Destination address mode
DMA_DMACCR_DSTAMODE_CONST
DMA_DMACCR_DSTAMODE_POSTINC
DMA_DMACCR_DSTAMODE_SGLINDX
DMA_DMACCR_DSTAMODE_DBLINDX */
DMA_DMACCR_SRCAMODE_CONST, /* Source address mode 源地址不改变
DMA_DMACCR_SRCAMODE_CONST
DMA_DMACCR_SRCAMODE_POSTINC
DMA_DMACCR_SRCAMODE_SGLINDX
DMA_DMACCR_SRCAMODE_DBLINDX */
DMA_DMACCR_ENDPROG_OFF, /* End of programmation bit
DMA_DMACCR_ENDPROG_ON
DMA_DMACCR_ENDPROG_OFF */
DMA_DMACCR_REPEAT_OFF, /* Repeat condition
DMA_DMACCR_REPEAT_ON
DMA_DMACCR_REPEAT_ALWAYS
DMA_DMACCR_REPEAT_ENDPROG1
DMA_DMACCR_REPEAT_OFF */
DMA_DMACCR_AUTOINIT_OFF,/* Auto initialization bit 。。。。。。。。。。。。。
DMA_DMACCR_AUTOINIT_ON
DMA_DMACCR_AUTOINIT_OFF */
DMA_DMACCR_EN_STOP, /* Channel enable
DMA_DMACCR_EN_START
DMA_DMACCR_EN_STOP */
DMA_DMACCR_PRIO_LOW, /* Channel priority 通道优先级设置为低
DMA_DMACCR_PRIO_HI
DMA_DMACCR_PRIO_LOW */
DMA_DMACCR_FS_ELEMENT, /* Frame\Element Sync
DMA_DMACCR_FS_ENABLE
DMA_DMACCR_FS_DISABLE
DMA_DMACCR_FS_ELEMENT
DMA_DMACCR_FS_FRAME */
DMA_DMACCR_SYNC_REVT0 /* Synchronization control
DMA_DMACCR_SYNC_NONE
DMA_DMACCR_SYNC_REVT0
DMA_DMACCR_SYNC_XEVT0
DMA_DMACCR_SYNC_REVTA0
DMA_DMACCR_SYNC_XEVTA0
DMA_DMACCR_SYNC_REVT1
DMA_DMACCR_SYNC_XEVT1
DMA_DMACCR_SYNC_REVTA1
DMA_DMACCR_SYNC_XEVTA1
DMA_DMACCR_SYNC_REVT2
DMA_DMACCR_SYNC_XEVT2
DMA_DMACCR_SYNC_REVTA2
DMA_DMACCR_SYNC_XEVTA2
DMA_DMACCR_SYNC_TIM1INT
DMA_DMACCR_SYNC_TIM2INT
DMA_DMACCR_SYNC_EXTINT0
DMA_DMACCR_SYNC_EXTINT1
DMA_DMACCR_SYNC_EXTINT2
DMA_DMACCR_SYNC_EXTINT3
DMA_DMACCR_SYNC_EXTINT4
DMA_DMACCR_SYNC_EXTINT5 */
), /* DMACCR */
DMA_DMACICR_RMK(
DMA_DMACICR_BLOCKIE_OFF, /* Whole block interrupt enable
DMA_DMACICR_BLOCKIE_ON
DMA_DMACICR_BLOCKIE_OFF */
DMA_DMACICR_LASTIE_OFF, /* Last frame Interrupt enable
DMA_DMACICR_LASTIE_ON
DMA_DMACICR_LASTIE_OFF */
DMA_DMACICR_FRAMEIE_ON, /* Whole frame interrupt enable
DMA_DMACICR_FRAMEIE_ON
DMA_DMACICR_FRAMEIE_OFF */
DMA_DMACICR_FIRSTHALFIE_OFF, /* HAlf frame interrupt enable
DMA_DMACICR_FIRSTHALFIE_ON
DMA_DMACICR_FIRSTHALFIE_OFF */
DMA_DMACICR_DROPIE_OFF, /* Sync. event drop interrupt enable
DMA_DMACICR_DROPIE_ON
DMA_DMACICR_DROPIE_OFF */
DMA_DMACICR_TIMEOUTIE_OFF /* Time out inetrrupt enable
DMA_DMACICR_TIMEOUTIE_ON
DMA_DMACICR_TIMEOUTIE_OFF */
), /* DMACICR */
(DMA_AdrPtr)(MCBSP_ADDR(DRR10)), /* DMACSSAL 源地址 */
0, /* DMACSSAU */
(DMA_AdrPtr )&dstPing, /* DMACDSAL 目的地址*/
0, /* DMACDSAU */
ADC_N, /* DMACEN */
1, /* DMACFN */
0, /* DMACFI */
0 /* DMACEI */
};
//CH1用于 AUDIO 输出
DMA_Config DMACH1_Cfg = { /* DMA configuration structure*/
DMA_DMACSDP_RMK(
DMA_DMACSDP_DSTBEN_NOBURST , /* Destination burst
DMA_DMACSDP_DSTBEN_NOBURST
DMA_DMACSDP_DSTBEN_BURST4
*/
DMA_DMACSDP_DSTPACK_OFF, /* Destination packing
DMA_DMACSDP_DSTPACK_ON
DMA_DMACSDP_DSTPACK_OFF */
DMA_DMACSDP_DST_PERIPH, /* Destination selection :-
DMA_DMACSDP_DST_SARAM
DMA_DMACSDP_DST_DARAM
DMA_DMACSDP_DST_EMIF
DMA_DMACSDP_DST_PERIPH */
DMA_DMACSDP_SRCBEN_NOBURST , /* Source burst :-
DMA_DMACSDP_SRCBEN_NOBURST
DMA_DMACSDP_SRCBEN_BURST4 */
DMA_DMACSDP_SRCPACK_OFF, /* Source packing :-
DMA_DMACSDP_SRCPACK_ON
DMA_DMACSDP_SRCPACK_OFF */
DMA_DMACSDP_SRC_DARAM, /* Source selection
DMA_DMACSDP_SRC_SARAM
DMA_DMACSDP_SRC_DARAM
DMA_DMACSDP_SRC_EMIF
DMA_DMACSDP_SRC_PERIPH */
DMA_DMACSDP_DATATYPE_16BIT /* Data type
DMA_DMACSDP_DATATYPE_8BIT
DMA_DMACSDP_DATATYPE_16BIT
DMA_DMACSDP_DATATYPE_32BIT */
), /* DMACSDP */
DMA_DMACCR_RMK(
DMA_DMACCR_DSTAMODE_CONST, /* Destination address mode 目标地址不改变,McBSP
DMA_DMACCR_DSTAMODE_CONST
DMA_DMACCR_DSTAMODE_POSTINC
DMA_DMACCR_DSTAMODE_SGLINDX
DMA_DMACCR_DSTAMODE_DBLINDX */
DMA_DMACCR_SRCAMODE_POSTINC, /* Source address mode :-源地址改变 ,数据
DMA_DMACCR_SRCAMODE_CONST
DMA_DMACCR_SRCAMODE_POSTINC
DMA_DMACCR_SRCAMODE_SGLINDX
DMA_DMACCR_SRCAMODE_DBLINDX */
DMA_DMACCR_ENDPROG_OFF, /* End of programmation bit
DMA_DMACCR_ENDPROG_ON
DMA_DMACCR_ENDPROG_OFF */
DMA_DMACCR_REPEAT_OFF, /* Repeat condition
DMA_DMACCR_REPEAT_ON
DMA_DMACCR_REPEAT_ALWAYS
DMA_DMACCR_REPEAT_ENDPROG1
DMA_DMACCR_REPEAT_OFF */
DMA_DMACCR_AUTOINIT_OFF,/* Auto initialization bit
DMA_DMACCR_AUTOINIT_ON
DMA_DMACCR_AUTOINIT_OFF */
DMA_DMACCR_EN_STOP, /* Channel enable
DMA_DMACCR_EN_START
DMA_DMACCR_EN_STOP */
DMA_DMACCR_PRIO_LOW, /* Channel priority 通道优先级设置为低
DMA_DMACCR_PRIO_HI
DMA_DMACCR_PRIO_LOW */
DMA_DMACCR_FS_ELEMENT, /* Frame\Element Sync
DMA_DMACCR_FS_ENABLE
DMA_DMACCR_FS_DISABLE
DMA_DMACCR_FS_ELEMENT
DMA_DMACCR_FS_FRAME */
DMA_DMACCR_SYNC_REVT0/* Synchronization control :-
DMA_DMACCR_SYNC_NONE
DMA_DMACCR_SYNC_REVT0
DMA_DMACCR_SYNC_XEVT0
DMA_DMACCR_SYNC_REVTA0
DMA_DMACCR_SYNC_XEVTA0
DMA_DMACCR_SYNC_REVT1
DMA_DMACCR_SYNC_XEVT1
DMA_DMACCR_SYNC_REVTA1
DMA_DMACCR_SYNC_XEVTA1
DMA_DMACCR_SYNC_REVT2
DMA_DMACCR_SYNC_XEVT2
DMA_DMACCR_SYNC_REVTA2
DMA_DMACCR_SYNC_XEVTA2
DMA_DMACCR_SYNC_TIM1INT
DMA_DMACCR_SYNC_TIM2INT
DMA_DMACCR_SYNC_EXTINT0
DMA_DMACCR_SYNC_EXTINT1
DMA_DMACCR_SYNC_EXTINT2
DMA_DMACCR_SYNC_EXTINT3
DMA_DMACCR_SYNC_EXTINT4
DMA_DMACCR_SYNC_EXTINT5 */
), /* DMACCR */
DMA_DMACICR_RMK(
DMA_DMACICR_BLOCKIE_OFF, /* Whole block interrupt enable :-
DMA_DMACICR_BLOCKIE_ON
DMA_DMACICR_BLOCKIE_OFF */
DMA_DMACICR_LASTIE_OFF, /* Last frame Interrupt enable :-
DMA_DMACICR_LASTIE_ON
DMA_DMACICR_LASTIE_OFF */
DMA_DMACICR_FRAMEIE_ON, /* Whole frame interrupt enable :-
DMA_DMACICR_FRAMEIE_ON
DMA_DMACICR_FRAMEIE_OFF */
DMA_DMACICR_FIRSTHALFIE_OFF, /* HAlf frame interrupt enable :-
DMA_DMACICR_FIRSTHALFIE_ON
DMA_DMACICR_FIRSTHALFIE_OFF */
DMA_DMACICR_DROPIE_OFF, /* Sync. event drop interrupt enable :-
DMA_DMACICR_DROPIE_ON
DMA_DMACICR_DROPIE_OFF */
DMA_DMACICR_TIMEOUTIE_OFF /* Time out inetrrupt enable :-
DMA_DMACICR_TIMEOUTIE_ON
DMA_DMACICR_TIMEOUTIE_OFF */
), /* DMACICR */
(DMA_AdrPtr)&audioBuf, /* DMACDSAL 源地址*/
0, /* DMACSSAU */
(DMA_AdrPtr)(MCBSP_ADDR(DXR11)), /* DMACSSAL 目的地址 */
0, /* DMACDSAU */
AUDIO_DMA_N, /* DMACEN */
1, /* DMACFN */
0, /* DMACFI */
0 /* DMACEI */
};
//CH2用于 AGC输出
DMA_Config DMACH2_Cfg = { /* DMA configuration structure*/
DMA_DMACSDP_RMK(
DMA_DMACSDP_DSTBEN_NOBURST , /* Destination burst :-
DMA_DMACSDP_DSTBEN_NOBURST
DMA_DMACSDP_DSTBEN_BURST4
*/
DMA_DMACSDP_DSTPACK_ON, /* Destination packing :-
DMA_DMACSDP_DSTPACK_ON
DMA_DMACSDP_DSTPACK_OFF */
DMA_DMACSDP_DST_PERIPH, /* Destination selection :-
DMA_DMACSDP_DST_SARAM
DMA_DMACSDP_DST_DARAM
DMA_DMACSDP_DST_EMIF
DMA_DMACSDP_DST_PERIPH */
DMA_DMACSDP_SRCBEN_NOBURST , /* Source burst :-
DMA_DMACSDP_SRCBEN_NOBURST
DMA_DMACSDP_SRCBEN_BURST4 */
DMA_DMACSDP_SRCPACK_OFF, /* Source packing :-
DMA_DMACSDP_SRCPACK_ON
DMA_DMACSDP_SRCPACK_OFF */
DMA_DMACSDP_SRC_DARAM, /* Source selection
DMA_DMACSDP_SRC_SARAM
DMA_DMACSDP_SRC_DARAM
DMA_DMACSDP_SRC_EMIF
DMA_DMACSDP_SRC_PERIPH */
DMA_DMACSDP_DATATYPE_8BIT /* Data type
DMA_DMACSDP_DATATYPE_8BIT
DMA_DMACSDP_DATATYPE_16BIT
DMA_DMACSDP_DATATYPE_32BIT */
), /* DMACSDP */
DMA_DMACCR_RMK(
DMA_DMACCR_DSTAMODE_CONST, /* Destination address mode 目标地址不改变,McBSP
DMA_DMACCR_DSTAMODE_CONST
DMA_DMACCR_DSTAMODE_POSTINC
DMA_DMACCR_DSTAMODE_SGLINDX
DMA_DMACCR_DSTAMODE_DBLINDX */
DMA_DMACCR_SRCAMODE_POSTINC, /* Source address mode 源地址改变,数据
DMA_DMACCR_SRCAMODE_CONST
DMA_DMACCR_SRCAMODE_POSTINC
DMA_DMACCR_SRCAMODE_SGLINDX
DMA_DMACCR_SRCAMODE_DBLINDX */
DMA_DMACCR_ENDPROG_OFF, /* End of programmation bit
DMA_DMACCR_ENDPROG_ON
DMA_DMACCR_ENDPROG_OFF */
DMA_DMACCR_REPEAT_OFF, /* Repeat condition
DMA_DMACCR_REPEAT_ON
DMA_DMACCR_REPEAT_ALWAYS
DMA_DMACCR_REPEAT_ENDPROG1
DMA_DMACCR_REPEAT_OFF */
DMA_DMACCR_AUTOINIT_OFF, /* Auto initialization bit
DMA_DMACCR_AUTOINIT_ON
DMA_DMACCR_AUTOINIT_OFF */
DMA_DMACCR_EN_STOP, /* Channel enable
DMA_DMACCR_EN_START
DMA_DMACCR_EN_STOP */
DMA_DMACCR_PRIO_LOW, /* Channel priority 通道优先级设置为低
DMA_DMACCR_PRIO_HI
DMA_DMACCR_PRIO_LOW */
DMA_DMACCR_FS_ELEMENT, /* Frame\Element Sync
DMA_DMACCR_FS_ENABLE
DMA_DMACCR_FS_DISABLE
DMA_DMACCR_FS_ELEMENT
DMA_DMACCR_FS_FRAME */
DMA_DMACCR_SYNC_REVT0 /* Synchronization control :-
DMA_DMACCR_SYNC_NONE
DMA_DMACCR_SYNC_REVT0
DMA_DMACCR_SYNC_XEVT0
DMA_DMACCR_SYNC_REVTA0
DMA_DMACCR_SYNC_XEVTA0
DMA_DMACCR_SYNC_REVT1
DMA_DMACCR_SYNC_XEVT1
DMA_DMACCR_SYNC_REVTA1
DMA_DMACCR_SYNC_XEVTA1
DMA_DMACCR_SYNC_REVT2
DMA_DMACCR_SYNC_XEVT2
DMA_DMACCR_SYNC_REVTA2
DMA_DMACCR_SYNC_XEVTA2
DMA_DMACCR_SYNC_TIM1INT
DMA_DMACCR_SYNC_TIM2INT
DMA_DMACCR_SYNC_EXTINT0
DMA_DMACCR_SYNC_EXTINT1
DMA_DMACCR_SYNC_EXTINT2
DMA_DMACCR_SYNC_EXTINT3
DMA_DMACCR_SYNC_EXTINT4
DMA_DMACCR_SYNC_EXTINT5 */
), /* DMACCR */
DMA_DMACICR_RMK(
DMA_DMACICR_BLOCKIE_OFF, /* Whole block interrupt enable :-
DMA_DMACICR_BLOCKIE_ON
DMA_DMACICR_BLOCKIE_OFF */
DMA_DMACICR_LASTIE_OFF, /* Last frame Interrupt enable :-
DMA_DMACICR_LASTIE_ON
DMA_DMACICR_LASTIE_OFF */
DMA_DMACICR_FRAMEIE_ON, /* Whole frame interrupt enable :-
DMA_DMACICR_FRAMEIE_ON
DMA_DMACICR_FRAMEIE_OFF */
DMA_DMACICR_FIRSTHALFIE_OFF, /* HAlf frame interrupt enable :-
DMA_DMACICR_FIRSTHALFIE_ON
DMA_DMACICR_FIRSTHALFIE_OFF */
DMA_DMACICR_DROPIE_OFF, /* Sync. event drop interrupt enable :-
DMA_DMACICR_DROPIE_ON
DMA_DMACICR_DROPIE_OFF */
DMA_DMACICR_TIMEOUTIE_OFF /* Time out inetrrupt enable :-
DMA_DMACICR_TIMEOUTIE_ON
DMA_DMACICR_TIMEOUTIE_OFF */
), /* DMACICR */
(DMA_AdrPtr)&agcBuf, /* DMACDSAL 源地址*/
0, /* DMACSSAU */
(DMA_AdrPtr)(MCBSP_ADDR(DXR12)), /* DMACSSAL 目的地址 */
0, /* DMACDSAU */
2, /* DMACEN */
1, /* DMACFN */
0, /* DMACFI */
0 /* DMACEI */
};
DMA_Handle hDMACH0,hDMACH1,hDMACH2;
Uint16 srcAddrHi,srcAddrLo; //源地址
Uint16 dstAddrHi,dstAddrLo; //目的地址
//ADC
void IniDMA_CH0(void)
{
Uint16 hDMACH0_EventId;//,old_intm
tmp_index = 0;
IniDDS(); //初始化DDS
IniFIR(); //初始化FIR
for(Index = 0; Index < 1024; Index++)
{
audio_DDS[Index] = 0;
}
Index = 0;
hDMACH0 = DMA_open(DMA_CHA0, 0); /* Open DMA Channel 0 */
pingpong = PING;
srcAddrHi = (Uint16)(((Uint32)(MCBSP_ADDR(DRR10)))>>15) & 0xFFFF;//源地址，源地址
为MCBSP_ADDR
srcAddrLo = (Uint16)(((Uint32)(MCBSP_ADDR(DRR10)))<<1) & 0xFFFF;
dstAddrHi = (Uint16)(((Uint32)&dstPing)>>15) & 0xFFFF;//目的地址，目的地址为MEMORY
dstAddrLo = (Uint16)(((Uint32)&dstPing)<<1) & 0xFFFF;
/* By default, the TMS320C55xx compiler assigns all data symbols word */
/* addresses. The DMA however, expects all addresses to be byte */
/* addresses. Therefore, you must shift the address by 2 in order to change */
/* the word address to a byte address for the DMA transfer. */
//DMACH0_Cfg.dmacssal = (DMA_AdrPtr)(((Uint16)(DMACH0_Cfg.dmacssal)<<1)&0xFFFF);
//DMACH0_Cfg.dmacdsal = (DMA_AdrPtr)(((Uint16)(DMACH0_Cfg.dmacdsal)<<1)&0xFFFF);
//DMACH0_Cfg.dmacssau = (((Uint32) &src) >> 15) & 0xFFFF;
//DMACH0_Cfg.dmacdsau = (((Uint32) &dst) >> 15) & 0xFFFF;
DMACH0_Cfg.dmacssal = (DMA_AdrPtr)srcAddrLo;
DMACH0_Cfg.dmacssau = srcAddrHi;
DMACH0_Cfg.dmacdsal = (DMA_AdrPtr)dstAddrLo;
DMACH0_Cfg.dmacdsau = dstAddrHi;
hDMACH0_EventId = DMA_getEventId(hDMACH0);
IRQ_clear(hDMACH0_EventId);
IRQ_plug(hDMACH0_EventId,&dmaCh0Isr);
DMA_config(hDMACH0, &DMACH0_Cfg); /* Configure Channel */
IRQ_enable(hDMACH0_EventId);
DMA_FSETH(hDMACH0,DMACCR,ENDPROG,1);
DMA_start(hDMACH0); /* Begin Transfer */
}
//audio
void IniDMA_CH1(void) //Audio
{
//Uint16 hDMACH1_EventId;
hDMACH1 = DMA_open(DMA_CHA1, 0);/* Open DMA Channel 0 */
srcAddrHi = (Uint16)(((Uint32)&audioBuf)>>15) & 0xFFFF; //源地址，源地址MEMORY
srcAddrLo = (Uint16)(((Uint32)&audioBuf)<<1) & 0xFFFF;
dstAddrHi = (Uint16)(((Uint32)(MCBSP_ADDR(DXR11)))>>15) & 0xFFFF;//目的地址，目的地址为MCBSP_ADDR
dstAddrLo = (Uint16)(((Uint32)(MCBSP_ADDR(DXR11)))<<1) & 0xFFFF;
/* By default, the TMS320C55xx compiler assigns all data symbols word */
/* addresses. The DMA however, expects all addresses to be byte */
/* addresses. Therefore, you must shift the address by 2 in order to change */
/* the word address to a byte address for the DMA transfer. */
//DMACH1_Cfg.dmacssal = (DMA_AdrPtr)(((Uint16)(DMACH1_Cfg.dmacssal)<<1)&0xFFFF);
//DMACH1_Cfg.dmacdsal = (DMA_AdrPtr)(((Uint16)(DMACH1_Cfg.dmacdsal)<<1)&0xFFFF);
//DMACH1_Cfg.dmacssau = (((Uint32) &agcBuf) >> 15) & 0xFFFF;
//DMACH1_Cfg.dmacdsau = (((Uint32) &dst) >> 15) & 0xFFFF;
DMACH1_Cfg.dmacssal = (DMA_AdrPtr)srcAddrLo;
DMACH1_Cfg.dmacssau = srcAddrHi;
DMACH1_Cfg.dmacdsal = (DMA_AdrPtr)dstAddrLo;
DMACH1_Cfg.dmacdsau = dstAddrHi;
//hDMACH1_EventId = DMA_getEventId(hDMACH1);
//IRQ_clear(hDMACH1_EventId);
//IRQ_enable(hDMACH1_EventId);
//IRQ_plug(hDMACH1_EventId,&dmaCh1Isr);
DMA_config(hDMACH1, &DMACH1_Cfg); /* Configure Channel */
//DMA_start(hDMACH1); /* Begin Transfer */
}
//AGC
void IniDMA_CH2(void) //DAC8164
{
//Uint16 hDMACH2_EventId;
// IniDMAPara(); //初始化DMA全局参数
hDMACH2 = DMA_open(DMA_CHA2, 0); /*Open DMA Channel 2*/
srcAddrHi = (Uint16)(((Uint32)&agcBuf)>>15) & 0xFFFF; //源地址，源地址MEMORY
srcAddrLo = (Uint16)(((Uint32)&agcBuf)<<1) & 0xFFFF;
dstAddrHi = (Uint16)(((Uint32)(MCBSP_ADDR(DXR12)))>>15) & 0xFFFF;//目的地址，目的地址为MCBSP_ADDR
dstAddrLo = (Uint16)(((Uint32)(MCBSP_ADDR(DXR12)))<<1) & 0xFFFF;
/* By default, the TMS320C55xx compiler assigns all data symbols word */
/* addresses. The DMA however, expects all addresses to be byte */
/* addresses. Therefore, you must shift the address by 2 in order to change */
/* the word address to a byte address for the DMA transfer. */
//DMACH1_Cfg.dmacssal = (DMA_AdrPtr)(((Uint16)(DMACH1_Cfg.dmacssal)<<1)&0xFFFF);
//DMACH1_Cfg.dmacdsal = (DMA_AdrPtr)(((Uint16)(DMACH1_Cfg.dmacdsal)<<1)&0xFFFF);
//DMACH1_Cfg.dmacssau = (((Uint32) &agcBuf) >> 15) & 0xFFFF;
//DMACH1_Cfg.dmacdsau = (((Uint32) &dst) >> 15) & 0xFFFF;
DMACH2_Cfg.dmacssal = (DMA_AdrPtr)srcAddrLo;
DMACH2_Cfg.dmacssau = srcAddrHi;
DMACH2_Cfg.dmacdsal = (DMA_AdrPtr)dstAddrLo;
DMACH2_Cfg.dmacdsau = dstAddrHi;
//hDMACH2_EventId = DMA_getEventId(hDMACH2);
//IRQ_clear(hDMACH2_EventId);
//IRQ_enable(hDMACH2_EventId);
//IRQ_plug(hDMACH2_EventId,&dmaCh2Isr);
DMA_config(hDMACH2, &DMACH2_Cfg); /* Configure Channel */
//DMA_start(hDMACH2); /* Begin Transfer */
}
interrupt void dmaCh0Isr(void)
{
int I_Q_result;
int ATW;
unsigned char AM_H,AM_L;
//unsigned int AM_register = 0;
//float ac,dc;
//float temp;
//static int i;
//long int tmp;
//处理接收到的事情
// dmaCh0Process();
//Read the DMA status register to clear it so new interrupts will be seen
DMA_RGETH(hDMACH0,DMACSR);
DMA_start(hDMACH0); /* Begin Transfer */
head++;
}
/**/
void dmaCh0Process(void)
{
Uint32 addr;
while(DMA_FGETH(hDMACH0,DMACCR,ENDPROG))//获取DMACCR ENDPROG位的状态 ENDPROG = 0表示工作寄存器已经把配置寄存器的
{
;
}
if(pingpong == PING)
{
addr = ((Uint32)dstPong)<<1;
//set new state to pong
pingpong = PONG;
}
else if(pingpong == PONG)
{
addr = ((Uint32)dstPing)<<1;
//set new state to pong
pingpong = PING;
}
DMA_RSETH(hDMACH0,DMACDSAL,addr & 0xffff);
DMA_RSETH(hDMACH0,DMACDSAU,(addr>>16)&0xffff);
DMA_FSETH(hDMACH0,DMACCR,ENDPROG,1); //设置
}
void IniDDS(void)
{
rom_result = 0;
sin_addr = 0;
cos_addr = 0;
sin = 0;
cos = 0;
}
void IniFIR(void)
{
int i;
for(i=0;i<BL+2;i++)
{
I_dbuf[i] = 0;
Q_dbuf[i] = 0;
}
for(i=0;i<BL_BS+2;i++)
{
BS_dbuf[i] = 0;
}
}
/**/
void IniDMAPara(void)
{
int i;
for(i=0;i<AGC_DMA_N;i++)
{
agcBuf[i] = 0;
}
AGC_OUT = ((TAGC_OUT *)agcBuf);
}
void startDMA2(void)
{
DMA_start(hDMACH2);
}
其中interrupt void dmaCh0Isr(void)为处理DMA中断的函数；
头文件如下：
#ifndef __DMA_H__
#define __DMA_H__
// Example-specific initialization
#define ADC_N 1 // block size to transfer
#define AGC_DMA_N 1
#define AUDIO_DMA_N 1
#define PING 0
#define PONG 1
#define DAC_PORTA 0x00
#define DAC_PORTB 0x01
#define DAC_PORTC 0x02
#define DAC_PORTD 0x03
#define OSK_I1_ADDRESS 0x21
#define OSK_I2_ADDRESS 0x22
typedef union{
long int BUF;
struct {
int Default0:8;
int ADDR:2;
int LD:2;
int Default1:1;
int PORT:2;
int PD:1;
int DATA:14;
int Default2:2;
}DAC8164;
}TAGC_OUT;
extern TAGC_OUT *AGC_OUT;
extern Uint16 dstPing[ADC_N];
extern Uint16 dstPong[ADC_N];
extern Uint16 pingpong;
extern Uint32 agcBuf[AGC_DMA_N];
//extern Uint16 audioBuf[AUDIO_DMA_N];
//Step 2: Define and initialize the DMA channel configuration structure.
extern void dmaCh0Process(void); //处理收到的数据
extern void dmaDmod(void);
extern void IniDMA_CH0(void);
extern void IniDMA_CH1(void);
extern void IniDMA_CH2(void);
extern void AD9854_WR_Byte(unsigned char addr,unsigned char dat);
extern void ad9854_update(void);
#endif
