前言
带着上一篇的问题我们来到了本篇。
1、怎么确定哪些寄存器是需要的？
2、寄存器的取值？
3、开发板如果迁移以后，怎么去迁移寄存器？
一、sdk用到的几个地址宏？
#define NVDLA_BASE_ADDRESS XPAR_NV_NVDLA_WRAPPER_0_BASEADDR
#define PS_DDR0_BASE_ADDRESS XPAR_PS7_DDR_0_S_AXI_BASEADDR
这里定义的两个宏只是定义了但没有被使用，仅限于main.c、nv_small_run.c和nvdla_state.c三个文件。
二、sdk用到的寄存器分为哪几类？
我们还是先看看用到了哪些寄存器？
首先是nv_state.c文件内的寄存器：
void nvdla_wait_for_ready()
{
poll_field_equal(NVDLA_CDMA_S_STATUS_0, 0x30003,0);
poll_field_equal(NVDLA_CMAC_A_S_STATUS_0, 0x30003,0);
poll_field_equal(NVDLA_CMAC_B_S_STATUS_0, 0x30003,0);
poll_field_equal(NVDLA_CACC_S_STATUS_0, 0x30003,0);
poll_field_equal(NVDLA_CSC_S_STATUS_0, 0x30003,0);
poll_field_equal(NVDLA_SDP_RDMA_S_STATUS_0, 0x30003,0);
poll_field_equal(NVDLA_SDP_S_STATUS_0, 0x30003,0);
poll_field_equal(NVDLA_PDP_S_STATUS_0, 0x30003,0);
}
这里的一堆0x30003无法解释，暂时没有找到资料。我们先记住这些数据！
随后看nv_small_run.c文件下的寄存器：
reg_write(NVDLA_SDP_S_POINTER_0, 0x0);
reg_write(NVDLA_SDP_RDMA_S_POINTER_0, 0x0);
reg_write(NVDLA_SDP_S_LUT_LO_START_0, 0x0);
reg_write(NVDLA_SDP_S_LUT_ACCESS_CFG_0, 0x0);
reg_write(NVDLA_SDP_S_LUT_LE_SLOPE_SCALE_0, 0x0);
reg_write(NVDLA_SDP_S_LUT_LO_SLOPE_SCALE_0, 0x0);
reg_write(NVDLA_SDP_S_LUT_LE_END_0, 0x0);
reg_write(NVDLA_SDP_S_LUT_ACCESS_DATA_0, 0x0);
reg_write(NVDLA_SDP_S_LUT_INFO_0, 0x0);
reg_write(NVDLA_SDP_S_LUT_LO_SLOPE_SHIFT_0, 0x0);
reg_write(NVDLA_SDP_S_LUT_LE_START_0, 0x0);
reg_write(NVDLA_SDP_S_LUT_CFG_0, 0x0);
reg_write(NVDLA_SDP_S_LUT_LE_SLOPE_SHIFT_0, 0x0);
reg_write(NVDLA_SDP_S_LUT_LO_END_0, 0x0);
reg_write(NVDLA_SDP_D_CVT_OFFSET_0, 0x0);
reg_write(NVDLA_SDP_D_DST_DMA_CFG_0, 0x1);
reg_write(NVDLA_SDP_RDMA_D_SRC_SURFACE_STRIDE_0, 0x188000);
reg_write(NVDLA_SDP_D_DST_LINE_STRIDE_0, 0xe00);
reg_write(NVDLA_SDP_RDMA_D_SRC_LINE_STRIDE_0, 0xe00);
reg_write(NVDLA_SDP_RDMA_D_SRC_BASE_ADDR_HIGH_0, 0x0);
reg_write(NVDLA_SDP_RDMA_D_BRDMA_CFG_0, 0x1);
reg_write(NVDLA_SDP_RDMA_D_BS_BATCH_STRIDE_0, 0x0);
reg_write(NVDLA_SDP_D_DP_EW_ALU_CVT_SCALE_VALUE_0, 0x0);
reg_write(NVDLA_SDP_RDMA_D_EW_LINE_STRIDE_0, 0x0);
reg_write(NVDLA_SDP_RDMA_D_BN_BASE_ADDR_HIGH_0, 0x0);
reg_write(NVDLA_SDP_D_DP_EW_ALU_SRC_VALUE_0, 0x0);
reg_write(NVDLA_SDP_RDMA_D_NRDMA_CFG_0, 0x1);
reg_write(NVDLA_SDP_D_DP_EW_MUL_CVT_SCALE_VALUE_0, 0x0);
reg_write(NVDLA_SDP_RDMA_D_BN_BATCH_STRIDE_0, 0x0);
reg_write(NVDLA_SDP_D_DP_EW_MUL_CVT_TRUNCATE_VALUE_0, 0x0);
reg_write(NVDLA_SDP_RDMA_D_EW_BASE_ADDR_HIGH_0, 0x0);
reg_write(NVDLA_SDP_D_DP_EW_MUL_CFG_0, 0x2);
reg_write(NVDLA_SDP_D_DATA_CUBE_WIDTH_0, 0x1bf);
reg_write(NVDLA_SDP_D_DP_BN_ALU_CFG_0, 0x0);
reg_write(NVDLA_SDP_RDMA_D_EW_BASE_ADDR_LOW_0, base_addr + 0x80000000);
reg_write(NVDLA_SDP_D_DATA_CUBE_CHANNEL_0, 0x7);
reg_write(NVDLA_SDP_D_DATA_CUBE_HEIGHT_0, 0x1bf);
reg_write(NVDLA_SDP_D_DP_BS_MUL_SRC_VALUE_0, 0x0);
reg_write(NVDLA_SDP_RDMA_D_BN_LINE_STRIDE_0, 0x0);
reg_write(NVDLA_SDP_RDMA_D_BS_BASE_ADDR_HIGH_0, 0x0);
reg_write(NVDLA_SDP_D_DP_EW_ALU_CVT_OFFSET_VALUE_0, 0x0);
reg_write(NVDLA_SDP_RDMA_D_DATA_CUBE_CHANNEL_0, 0x7);
reg_write(NVDLA_SDP_D_DP_BN_MUL_CFG_0, 0x0);
reg_write(NVDLA_SDP_D_DP_BN_MUL_SRC_VALUE_0, 0x0);
reg_write(NVDLA_SDP_RDMA_D_BS_BASE_ADDR_LOW_0, base_addr + 0x80000000);
reg_write(NVDLA_SDP_RDMA_D_ERDMA_CFG_0, 0x1);
reg_write(NVDLA_SDP_D_DST_BASE_ADDR_HIGH_0, 0x0);
reg_write(NVDLA_SDP_RDMA_D_BS_SURFACE_STRIDE_0, 0x0);
reg_write(NVDLA_SDP_D_DP_EW_MUL_SRC_VALUE_0, 0x0);
reg_write(NVDLA_SDP_RDMA_D_BS_LINE_STRIDE_0, 0x0);
reg_write(NVDLA_SDP_D_DP_BS_ALU_SRC_VALUE_0, 0x0);
reg_write(NVDLA_SDP_D_CVT_SHIFT_0, 0x0);
reg_write(NVDLA_SDP_D_DP_EW_ALU_CFG_0, 0x2);
reg_write(NVDLA_SDP_D_DST_SURFACE_STRIDE_0, 0x188000);
reg_write(NVDLA_SDP_D_FEATURE_MODE_CFG_0, 0x0);
reg_write(NVDLA_SDP_RDMA_D_FEATURE_MODE_CFG_0, 0x0);
reg_write(NVDLA_SDP_D_DP_BS_CFG_0, 0x73);
reg_write(NVDLA_SDP_D_CVT_SCALE_0, 0x1);
reg_write(NVDLA_SDP_D_DP_BN_CFG_0, 0x53);
reg_write(NVDLA_SDP_D_DP_BN_ALU_SRC_VALUE_0, 0x0);
reg_write(NVDLA_SDP_RDMA_D_SRC_DMA_CFG_0, 0x1);
reg_write(NVDLA_SDP_D_DST_BATCH_STRIDE_0, 0x0);
reg_write(NVDLA_SDP_D_DP_BS_ALU_CFG_0, 0x0);
reg_write(NVDLA_SDP_RDMA_D_BN_SURFACE_STRIDE_0, 0x0);
reg_write(NVDLA_SDP_D_DP_EW_MUL_CVT_OFFSET_VALUE_0, 0x0);
reg_write(NVDLA_SDP_RDMA_D_EW_SURFACE_STRIDE_0, 0x0);
reg_write(NVDLA_SDP_D_DST_BASE_ADDR_LOW_0, base_addr + 0x200000);
reg_write(NVDLA_SDP_RDMA_D_EW_BATCH_STRIDE_0, 0x0);
reg_write(NVDLA_SDP_RDMA_D_PERF_ENABLE_0, 0x0);
reg_write(NVDLA_SDP_D_DP_EW_ALU_CVT_TRUNCATE_VALUE_0, 0x0);
reg_write(NVDLA_SDP_RDMA_D_DATA_CUBE_HEIGHT_0, 0x1bf);
reg_write(NVDLA_SDP_D_PERF_ENABLE_0, 0x0);
reg_write(NVDLA_SDP_D_DP_EW_TRUNCATE_VALUE_0, 0x0);
reg_write(NVDLA_SDP_RDMA_D_SRC_BASE_ADDR_LOW_0, base_addr + 0x0);
reg_write(NVDLA_SDP_RDMA_D_BN_BASE_ADDR_LOW_0, base_addr + 0x80000000);
reg_write(NVDLA_SDP_D_DP_BS_MUL_CFG_0, 0x0);
reg_write(NVDLA_SDP_D_DP_EW_CFG_0, 0x53);
reg_write(NVDLA_SDP_D_DATA_FORMAT_0, 0x0);
reg_write(NVDLA_SDP_RDMA_D_DATA_CUBE_WIDTH_0, 0x1bf);
reg_write(NVDLA_SDP_RDMA_D_OP_ENABLE_0, 0x1);
reg_write(NVDLA_SDP_D_OP_ENABLE_0, 0x1);
建议对比sdp_1x8192x1_pass_through_int8_0.cfg来看，会发现某些寄存器的取值其实不固定！暂时找不到寄存器的取值，我也只能对其中几个进行解释。
包含0x188000的若干行寄存器，这个数值十进制是1605632，刚好对应//0x40200000, "Image_q_dog_HW.bin", 1605632 bytes。另外一些寄存器的取值可以根据名称做大致猜测！
三、哪些寄存器是需要的？
这个问题的回答较难，我们只能从官网给出的若干个用例去确定，由于寄存器的列举过于复杂，我暂时没打算一个个列出来，工作量太大。在自己写SDK的时候去找官网的例子一个个解读即可。
四、另一个板子迁移时的寄存器需要注意什么？
这里所有的寄存器都被定义在opendla.h中，并且是以偏移地址的形式定义。所以迁移的时候只需要注意起始地址和赋予寄存器的值贴合实际需要即可。
总结
带着三个问题写了这篇水文，按照道理来说，写这篇博客需要大量测试经验，但我是为了先看懂整个框架再去测试，同时逐步提出我的问题与试探性解决问题，为之后可能遇到的问题做个铺垫。后续经验充足了，会另写几篇博客来叙述到底怎么进行寄存器的管理！